PCM3010DB datasheet(29/31 Pages) TI

29 / 31 page

PCM3010

SLES055 – NOVEMBER 2002

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VIN pins

A 1-

µF electrolytic capacitor is recommended as an ac-coupling capacitor, which gives an 8-Hz cutoff frequency.

If a higher full-scale input voltage is required, it can be adjusted by adding only one series resistor to each VIN

pin.

VREF1, VREF2 pins

A 0.1-

µF ceramic capacitor and a 10-µF electrolytic capacitor are recommended between VREF1, VREF2, and

AGND1 to ensure low source impedance of the ADC references. These capacitors should be located as close

as possible to the VREF1 and VREF2 pins and the AGND1 pin to reduce dynamic errors on the ADC references.

VCOM pin

A 0.1-

µF ceramic capacitor and a 10-µF electrolytic capacitor are recommended between VCOM and AGND2

to ensure low source impedance of the DAC common voltage. These capacitors should be located as close as

possible to the VCOM pin to reduce dynamic errors on the DAC common voltage.

system clock

The quality of SCKI may influence dynamic performance, as the PCM3010 (both DAC and ADC) operates

based on SCKI. Therefore, it may be necessary to consider the jitter, duty cycle, rise and fall time, etc., of the

system clock.

reset control

If large capacitors (more than 22

µF) are used on VREF1, VREF2, and VCOM, external reset control by

PDWN = LOW is required after the VREF1, VREF2, and VCOM transient response settles.

external mute control

To eliminate the clicking noise which is generated by DAC output dc level change during power-down ON/OFF

control, external mute control is generally required. The recommended control sequence is: external mute ON,

codec power down ON, SCKI stop and restart if necessary, codec power down OFF, and external mute OFF.

PCM3010DB 数据表(PDF) 29 Page - Texas Instruments