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ICS8602 数据表(PDF) 5 Page - Integrated Circuit Systems |
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ICS8602 数据表(HTML) 5 Page - Integrated Circuit Systems |
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5 / 10 page ![]() 8602BY www.icst.com/products/hiperclocks.html REV. F APRIL 16, 2003 5 Integrated Circuit Systems, Inc. ICS8602 ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR PRELIMINARY PARAMETER MEASUREMENT INFORMATION DIFFERENTIAL INPUT LEVEL 3.3V OUTPUT LOAD AC TEST CIRCUIT SCOPE Qx LVCMOS V DD, VDDA, VDDO = 1.65V±5% GND = -1.65V±5% CYCLE-TO-CYCLE JITTER V CMR Cross Points V PP GND CLK nCLK V DD odc & t PERIOD PROPAGATION DELAY OUTPUT RISE/FALL TIME Clock Outputs 20% 80% 80% 20% t R t F tsk(o) V DDO 2 V DDO 2 Qx Qy OUTPUT SKEW nCLK CLK Q0:Q8 t PD V DDO 2 STATIC PHASE OFFSET Pulse Width t PERIOD t PW t PERIOD odc = V DDO 2 Q0:Q8 ➤ ➤ V DDO 2 V DDO 2 V DDO 2 Q0:Q8 tjit(cc) = tcycle n –tcycle n+1 1000 Cycles tcycle n tcycle n+1 t(Ø) ➤ V DD 2 (where t(Ø) is any random sample, and t (Ø) mean is the average of the sampled cycles measured on controlled edges) t(Ø) mean = Static Phase Offset nCLK FB_IN CLK |
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