8602BY

www.icst.com/products/hiperclocks.html

REV. F APRIL 16, 2003

1

Integrated

Circuit

Systems, Inc.

ICS8602

PRELIMINARY

The ICS8602 is a high performance, low skew,

1-to-9 Differential-to-LVCMOS/LVTTL Zero De-

lay Buffer and a member of the HiPerClockS™

family of High Performance Clocks Solutions

from ICS. The CLK, nCLK pair can accept most

standard differential input levels. The VCO operates at a fre-

quency range of 250MHz to 500MHz. The external feedback

allows the device to achieve “zero delay” between the input

clock and the output clocks. The device is designed only for

1:1 input/output frequency ratios. The output divider allows a

wide input/output frequency range with the 250MHz to

500MHz VCO. The PLL_SEL pin can be used to bypass the

PLL for system test and debug purposes. In bypass mode,

the reference clock is routed around the PLL and into the in-

ternal output dividers.The low impedance LVCMOS/LVTTL out-

puts are designed to drive 50

Ω series or parallel terminated

transmission lines. The effective fanout can be doubled by

utilizing the ability of the outputs to drive two series termi-

nated lines. The differential reference clock input will accept

any differential signal levels.

• Fully integrated PLL

• 9 LVCMOS/LVTTL outputs, 7Ω typical output impedance

• CLK, nCLK pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL

• Output frequency range: 15.625MHz to 250MHz

• Input frequency range: 15.625MHz to 250MHz

• VCO range: 250MHz to 500MHz

• External feedback for “zero delay” clock regeneration

with configurable frequencies

• Cycle-to-cycle jitter: 36ps (typical)

• Output skew: 125ps (maximum)

• Static Phase Offset: TBD±100ps (typical)

• 3.3V supply voltage

• 0°C to 70°C ambient operating temperature

32 31 30 29 28 27 26 25

9

10 11 12 13 14 15 16

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

Q5

GND

Q4

Q3

GND

MR/nOE

CLK

nCLK

GND

DIV_SEL0

DIV_SEL1

GND

32-Lead LQFP

7mm x 7mm x 1.4mm package body

Y Package

Top View

ICS8602

The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial

product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.

HiPerClockS™

,&6

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

Q8

SEL0

SEL1

CLK

nCLK

FB_IN

PLL_SEL

MR/nOE

0

1

PLL

÷2

÷4

÷8

÷16