| 数据搜索系统,热门电子元器件搜索 |
|
CS5451A 数据表(PDF) 8 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CS5451A 数据表(HTML) 8 Page - Cirrus Logic |
|
8 / 14 page ![]() CS5451A 8 DS635PP1 SWITCHING CHARACTERISTICS Notes: 10. Device parameters are specified with a 4. 000MHz clock, OWRS = 1. 11. Specified using 10% and 90% points on wave-form of interest. Output loaded wi th 50pF. Parameter Symbol Min Typ Max Unit Master Clock Frequency (Note 10) XIN 3 4.000 5 MHz Master Clock Duty Cycle - 40 - 60 % Rise Times Any Digital Input (Note 11) Any Digital Output trise - - - 50 1.0 - µs ns Fall Times Any Digital Input (Note 11) Any Digital Output tfall - - - 50 1.0 - µs ns Serial Port Timing Serial Clock Frequency (Note 10) OWRS = “0” OWRS = “1” SCLK SCLK - - 500 1000 - - kHz kHz Serial Clock Pulse Width High (Note 10) Pulse Width Low (Note 10) t1 t2 - - 0.5 0.5 - - SCLK SCLK SCLK falling to New Data Bit t3 -- 50 ns FSO Falling to SCLK Rising Delay (Note 10) t4 -0.5 - SCLK FSO Pulse Width (Note 10) t5 -1 - SCLK SE Rising to Output Enabled t6 -- 50 ns SE Falling to Output in Tri-state t7 -- 50 ns SE 6 t 6 t SD O SC L K t 2 t 1 t 3 FS O 4 t 5 t MSB(V1) MSB(V1) - 1 LSB(I3) Figure 1. Serial Port Timing |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |