Octal E1 Line Interface — LXT381

Datasheet

13

2.0

Functional Description

The LXT381 is a fully integrated octal line interface unit designed for G.703 2.048 Mbps

applications. Each transceiver front end interfaces with four lines, one pair for transmit, one pair

for receive. These two lines comprise a digital data loop for full duplex transmission. The LXT381

is designed to operate as an analog front-end (line driver and data recovery) without any reference

clock.

2.1

Receiver

The eight receivers in the LXT381 are identical. The following paragraphs describe the operation

of a single receiver.

The receive signal is input to the LIU via a 1:1 transformer. See Figure 5. A peak detector samples

the received signal and determines its maximum value. A percentage of the peak value is provided

to the data slicers to ensure optimum signal-to-noise ratio.

The receiver is capable of accurately recovering signals with up to 12dB of attenuation (from 2.37

V nominal), corresponding to a received signal level of approximately 500 mV. Regardless of

received signal level, the peak detectors are held above a minimum level of 150 mV to provide

immunity from impulsive noise. After processing through the data slicers, the received signal is

routed to the data ports and to the receive monitor.

Recovered data is output at RPOS and RNEG. RPOS/RNEG polarity is determined by the RPOL

pin. In addition, RPOS and RNEG are internally connected to an EXOR that is fed to the RCLK

output for external clock recovery applications.

The receivers in the LXT381 can be powered down using the RPD pin. In this case, the receiver

outputs RCLK/RPOS/RNEG will be in a high impedance state.

2.1.1

Loss Of Signal Detector

The LXT381 includes an analog LOS detector (ALOS pins) compliant with ITU-G.775

recommendation. The LXT381 monitors the incoming signal amplitude. Any signal below 200mV

for more than 30

µs (typ) will assert the corresponding ALOS pin. The LOS condition is cleared

when the signal amplitude rises above 250mV. The LXT381 requires more than 10 and less than

255 bit periods to declare a LOS condition in accordance to ITU G.775.

During the LOS condition, the receiver outputs (RPOS and RNEG) will be held high.

2.2

Transmitter

The eight low power transmitters of the LXT381 are identical.

The LXT381 transmitters can work either with NRZ or RZ formatted signals, depending on the

TCLK state. See Table 2. When TCLK is active, NRZ data applied to TPOS/TNEG is clocked

serially into the device. The TPOS/TNEG inputs are sampled on the falling edge of TCLK.