R4 REGISTER

The R4 register address bits (R3 [3:0]) are “0111”.

Register R4 is used to set the IF N counters if the default value is not desired. This register is only active if the SPI_DEF bit in

register R0 is 0.

The IF N counter consists of the 9-bit programmable counter (IF_B counter) and the 4-bit swallow counter (IF_A counter). The

equations for calculating the counter values are presented below.

R4 REGISTER

MSB

SHIFT REGISTER BIT LOCATION

LSB

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9876543210

Data Field

Address

Field

R4

0

001000

IF_A

[3:0]

IF_B

[8:0]

0111

Name

Functions

IF_A [3:0]

IF A Counter

4-bit swallow counter

0

≤ IF_A ≤ 15

IF_B [8:0]

IF B Counter

9-bit programmable counter

1

≤ IF_B ≤ 511

IF Frequency Setting:

f

where

f

IF_B: Preset divide ratio of binary 9-bit programmable counter (1

≤ IF_B ≤ 511)

IF_A: Preset divide ratio of binary 4-bit swallow counter (0

≤ IF_A ≤ 15)

IF_R: Preset divide ratio of binary 9-bit programmable reference counter (2

≤ IF_R ≤ 511)

f

R5 REGISTER

The R5 register address bits (R5 [4:0]) are “01111”.

Register R5 is used to set the IF_R divider if the default value is not desired. This register is only active if the SPI_DEF bit in

register R0 is 0.

R5 REGISTER

MSB

SHIFT REGISTER BIT LOCATION

LSB

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9876543210

Data Field

Address

Field

R5

0

011000010

IF_R

[8:0]

01111

Name

Functions

IF_R [8:0]

IF R Counter

9-bit programmable counter

2

≤ IF_R ≤ 511

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