PCA9510DP datasheet(2/19 Pages) PHILIPS

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Philips Semiconductors

Product data sheet

PCA9510; PCA9511

Hot swappable I2C and SMBus bus buffer

2004 Oct 05

DESCRIPTION

The PCA9510 and PCA9511 are hot swappable I2C and SMBus

buffers that allows I/O card insertion into a live backplane without

corrupting the data and clock buses. Control circuitry prevents the

backplane from being connected to the card until a stop command

or bus idle occurs on the backplane without bus contention on the

card. When the connection is made, the PCA9510 and PCA9511

provides bi-directional buffering, keeping the backplane and card

capacitances isolated.

The PCA9511 rise time accelerator circuitry allows the use of

weaker DC pull-up currents while still meeting rise time

requirements, while the PCA9510 has no rise time accelerator

circuitry to prevent interference when there are multiple devices in

the same system. The PCA9510 and PCA9511 incorporate a digital

ENABLE input pin, which enables the device when asserted HIGH

and forces the device into a low current mode when asserted LOW,

and an open-drain READY output pin, which indicates that the

backplane and card sides are connected together (HIGH) or not

(LOW).

During insertion, the PCA9510 (IN only) and PCA9511 SDA and

SCL lines are precharged to 1 V to minimize the current required to

charge the parasitic capacitance of the chip.

The dynamic offset design of the PCA9510/11/12/13/14 I/O drivers

allow them to be connected to another PCA9510/11/12/13/14 device

in series or in parallel and to the A side of the PCA9517. The

PCA9510/11/12/13/14 can not connect to the static offset I/Os used

on the PCA9515/15A/16/16A/17 B side and PCA9518.

APPLICATION

• cPCI, VME, AdvancedTCA cards and other multi-point backplane

cards that are required to be inserted or removed from an

operating system.

FEATURES

• Bi-directional buffer for SDA and SCL lines increases fanout and

prevents SDA and SCL corruption during live board insertion and

removal from multi-point backplane systems

• Compatible with I2C standard mode, I2C fast mode, and SMBus

standards

• ∆V/∆t rise time accelerators on all SDA and SCL lines (PCA9511

only)

• Rise time accelerator threshold of 0.6 V

• Active high ENABLE input

• Active high READY open-drain output

• High impedance SDA and SCL pins for V

CC = 0 V

• 1 V precharge on all SDA and SCL lines (PCA9510 IN only)

• Supports clock stretching and multiple master

arbitration/synchronization

• Operating power supply voltage range: 2.7 V to 5.5 V

• 5.5 V tolerant I/Os

• 0 to 400 kHz clock frequency

• ESD protection exceeds 2000 V HBM per JESD22-A114,

200 V MM per JESD22-A115, and 1000 V CDM per

JESD22-C101

• Latch-up testing is done to JEDEC Standard JESD78 which

exceeds 100 mA

• Package offer: SO8, TSSOP8 (MSOP8)

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

ORDER CODE

TOPSIDE MARK

DRAWING NUMBER

8-pin plastic SO

–40

°C to +85 °C

PCA9510D

PCA9510

SOT96-1

8-pin plastic SO

–40

°C to +85 °C

PCA9511D

PCA9511

SOT96-1

8-pin plastic TSSOP (MSOP)

–40

°C to +85 °C

PCA9510DP

9510

SOT505-1

8-pin plastic TSSOP (MSOP)

–40

°C to +85 °C

PCA9511DP

9511

SOT505-1

Standard packing quantities and other packaging data is available at www.standardproducts.philips.com/packaging.

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