数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

SAF7118H 数据表(PDF) 25 Page - NXP Semiconductors

部件名 SAF7118H
功能描述  Multistandard video decoder with adaptive comb filter and component video input
PDF  173 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

SAF7118H 数据表(HTML) 25 Page - NXP Semiconductors

Back Button SAF7118H Datasheet HTML 21Page - NXP Semiconductors SAF7118H Datasheet HTML 22Page - NXP Semiconductors SAF7118H Datasheet HTML 23Page - NXP Semiconductors SAF7118H Datasheet HTML 24Page - NXP Semiconductors SAF7118H Datasheet HTML 25Page - NXP Semiconductors SAF7118H Datasheet HTML 26Page - NXP Semiconductors SAF7118H Datasheet HTML 27Page - NXP Semiconductors SAF7118H Datasheet HTML 28Page - NXP Semiconductors SAF7118H Datasheet HTML 29Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 25 / 173 page
background image
2004 Jul 22
25
Philips Semiconductors
Product specification
Multistandard video decoder with adaptive
comb filter and component video input
SAF7118
8.1.2.1
Chrominance path
The 9-bit CVBS or chrominance input signal is fed to the
input of a quadrature demodulator, where it is multiplied by
two time-multiplexed subcarrier signals from the subcarrier
generation block 1 (0
° and 90° phase relationship to the
demodulator axis). The frequency is dependent on the
chosen colour standard.
The time-multiplexed output signals of the multipliers are
low-pass filtered (low-pass 1). Eight characteristics are
programmable via LCWB3 to LCWB0 to achieve the
desired bandwidth for the colour difference signals (PAL,
NTSC) or the 0
° and 90° FM signals (SECAM).
The chrominance low-pass 1 characteristic also influences
the grade of cross-luminance reduction during horizontal
colour transients (large chrominance bandwidth means
strong suppression of cross-luminance). If the Y-comb
filter is disabled by YCOMB = 0 the filter influences directly
the width of the chrominance notch within the luminance
path (a large chrominance bandwidth means wide
chrominance notch resulting in a lower luminance
bandwidth).
The low-pass filtered signals are fed to the adaptive comb
filter block. The chrominance components are separated
from the luminance via a two-line vertical stage (four lines
for PAL standards) and a decision logic between the
filtered and the non-filtered output signals. This block is
bypassed for SECAM signals. The comb filter logic can be
enabled independently for the succeeding luminance and
chrominance processing by YCOMB (subaddress 09H,
bit D6) and/or CCOMB (subaddress 0EH, bit D0). It is
always bypassed during VBI or raw data lines
programmable by the LCRn registers (subaddresses
41H to 57H); see Section 8.3.
The separated CB-CR components are further processed
by a second filter stage (low-pass 2) to modify the
chrominance bandwidth without influencing the luminance
path. Its characteristic is controlled by CHBW
(subaddress 10H, bit D3). For the complete transfer
characteristic of low-passes 1 and 2 see Figs 12 and 13.
The SECAM processing (bypassed for QAM standards)
contains the following blocks:
• Baseband ‘bell’ filters to reconstruct the amplitude and
phase equalized 0
° and 90° FM signals
• Phase demodulator and differentiator
(FM-demodulation)
• De-emphasis filter to compensate the pre-emphasized
input signal, including frequency offset compensation
(DB or DR white carrier values are subtracted from the
signal, controlled by the SECAM switch signal).
The succeeding chrominance gain control block amplifies
or attenuates the CB-CR signal according to the required
ITU 601/656 levels. It is controlled by the output signal
from the amplitude detection circuit within the burst
processing block.
The burst processing block provides the feedback loop of
the chrominance PLL and contains the following:
• Burst gate accumulator
• Colour identification and colour killer
• Comparison nominal/actual burst amplitude (PAL/NTSC
standards only)
• Loop filter chrominance gain control (PAL/NTSC
standards only)
• Loop filter chrominance PLL (only active for PAL/NTSC
standards)
• PAL/SECAM sequence detection, H/2-switch
generation.
The increment generation circuit produces the Discrete
Time Oscillator (DTO) increment for both subcarrier
generation blocks. It contains a division by the increment
of the line-locked clock generator to create a stable
phase-locked sine signal under all conditions (e.g. for
non-standard signals).
The PAL delay line block eliminates crosstalk between the
chrominance channels in accordance with the PAL
standard requirements. For NTSC colour standards the
delay line can be used as an additional vertical filter.
If desired, it can be switched off by DCVF = 1. It is always
disabled during VBI or raw data lines programmable by the
LCRn registers (subaddresses 41H to 57H); see
Section 8.3. The embedded line delay is also used for
SECAM recombination (cross-over switches).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com