TSC2003

9

SBAS162D

www.ti.com

THEORY OF OPERATION

The TSC2003 is a classic Successive Approximation

Register (SAR) Analog-to-Digital (A/D) converter. The archi-

tecture is based on capacitive redistribution which inherently

includes a sample-and-hold function. The converter is fabri-

cated on a 0.6

µ CMOS process.

The basic operation of the TSC2003 is shown in Figure 1.

The device features an internal 2.5V reference and an

internal clock. Operation is maintained from a single supply

of 2.7V to 5.25V. The internal reference can be overdriven

with an external, low-impedance source between 2V and

input range of the converter.

The analog input (X, Y, and Z parallel coordinates, auxiliary

inputs, battery voltage, and chip temperature) to the con-

verter is provided via a multiplexer. A unique configuration of

low on-resistance switches allows an unselected A/D con-

verter input channel to provide power, and an accompanying

pin to provide ground for an external device. By maintaining

FIGURE 1. Basic Operation of the TSC2003.

a differential input to the converter, and a differential refer-

ence architecture, it is possible to negate the switch’s on-

resistance error (should this be a source of error for the

particular measurement).

ANALOG INPUT

See Figure 2 for a block diagram of the input multiplexer on

the TSC2003, the differential input of the A/D converter, and

the converter's differential reference.

When the converter enters the Hold mode, the voltage

difference between the +IN and –IN inputs (see Figure 2) is

captured on the internal capacitor array. The input current on

the analog inputs depends on the conversion rate of the

device. During the sample period, the source must charge

the internal sampling capacitor (typically 25pF). After the

capacitor has been fully charged, there is no further input

current. The amount of charge transfer from the analog

source to the converter is a function of conversion rate.

1

2

3

4

5

6

7

8

+V

DD

X+

Y+

X–

Y–

GND

V

BAT1

V

BAT2

IN1

IN2

A0

A1

SCL

SDA

PENIRQ

V

REF

16

15

14

13

12

11

10

9

TSC2003

Serial Clock

Serial Data

Pen Interrupt

+

1

µF

to

10

µF

(Optional)

+2.7V to +5V

Touch

Screen

0.1

µF

1

µF

to

10

µF

(Optional)

0.1

µF

+

Main

Battery

Secondary

Battery

1.2k

Ω

50k

Ω

1.2k

Ω

Auxiliary Input

Auxiliary Input

Voltage

Regulator