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AD5160BRJ5-R2 数据表(PDF) 15 Page - Analog Devices |
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AD5160BRJ5-R2 数据表(HTML) 15 Page - Analog Devices |
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15 / 16 page ![]() AD5160 Rev. 0 | Page 15 of 16 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN CONFIGURATION A B CS SDI 1 2 3 4 5 8 7 6 W VDD GND CLK TOP VIEW (Not to Scale) AD5160 Figure 43. PIN FUNCTION DESCRIPTIONS Table 8. Pin Name Description 1 W W Terminal. 2 VDD Positive Power Supply. 3 GND Digital Ground. 4 CLK Serial Clock Input. Positive edge triggered. 5 SDI Serial Data Input. 6 CS Chip Select Input, Active Low. When CS returns high, data will be loaded into the DAC register. 7 B B Terminal. 8 A A Terminal. |
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