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AS4C32M16D2 数据表(PDF) 39 Page - Alliance Semiconductor Corporation |
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AS4C32M16D2 数据表(HTML) 39 Page - Alliance Semiconductor Corporation |
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39 / 70 page ![]() AS4C32M16D2 Alliance Memory Inc. 551 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice. 39 Rev. 1.1 Feb. /2013 Timing Waveforms Figure 8. Initialization sequence after power-up CK CK# tCH CKE Command tCL tIS ODT tIS NOP PRE ALL EMR S MRS PRE ALL REF REF MRS EMR S EMR S ANY CMD 400ns tRP tMRD tMRD tRP tMRD Follow OCD Flowchart tOIT min 200 Cycle DLL ENABLE DLL RESET OCD Default OCD CAL.MOD E EXIT NOTE 1: To guarantee ODT off, VREF must be valid and a LOW level must be applied to the ODT pin. tRFC tRFC Figure 9. OCD drive mode CK# Hi-Z CK DQS DQS# DQs HIGH for Drive(1) CMD OCD calibration mode exit tOIT Enter Drive mode EMRS NOP NOP NOP EMRS DQ DQS HIGH & DQS# LOW for Drive(1), DQS LOW & DQS# HIGH for Drive(0) DQs LOW for Drive(0) tOIT Hi-Z NOTE : Drive mode, both Drive(1) and Drive(0), is used for controllers to measure DDR2 SDRAM Driver impedance.In this mode, all outputs are driven out tOIT after "enter drive mode" command and all output drivers are turned-off tOIT after "OCD calibration mode exit" command. |
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