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EMC1187 数据表(PDF) 40 Page - Microchip Technology |
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EMC1187 数据表(HTML) 40 Page - Microchip Technology |
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40 / 47 page ![]() Triple Channel 1°C Temperature Sensor with Hardware Thermal Shutdown and 1.8V SMBus Communications Datasheet Revision 1.0 (07-11-13) 40 SMSC EMC1187 DATASHEET APPLICATION NOTE: When measuring a 65nm Intel CPU, the Ideality Setting should be the default 12h. When measuring a 45nm Intel CPU, the Ideality Setting should be 15h. 6.16 High Limit Status Register 35h The High Limit Status Register contains the status bits that are set when a temperature channel high limit is exceeded. If any of these bits are set, the HIGH status bit in the Status Register is set. Reading from the High Limit Status Register will clear all bits if. Reading from the register will also clear the HIGH status bit in the Status Register. The ALERT pin will be set if the programmed number of consecutive alert counts have been met and any of these status bits are set. The status bits will remain set until read unless the ALERT pin is configured as a comparator output (see Section 5.5.2). Bit 2 - E2HIGH - This bit is set when the External Diode 2 channel exceeds its programmed high limit. Bit 1 - E1HIGH - This bit is set when the External Diode 1 channel exceeds its programmed high limit. Bit 0 - IHIGH - This bit is set when the Internal Diode channel exceeds its programmed high limit. 6.17 Low Limit Status Register 36h The Low Limit Status Register contains the status bits that are set when a temperature channel drops below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set. Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear the LOW status bit in the Status Register. 14h 1.0026 24h 1.0239 34h 1.0447 15h 1.0039 25h 1.0252 35h 1.0460 16h 1.0053 26h 1.0265 36h 1.0473 17h 1.0066 27h 1.0278 37h 1.0486 Table 6.21 High Limit Status Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 35h R-C High Limit Status - - - - - E2HIGH EHIGH IHIGH 00h Table 6.22 Low Limit Status Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 36h R-C Low Limit Status - - - - - E2LOW ELOW ILOW 00h Table 6.20 Substrate Diode Ideality Factor Look-Up Table (BJT Model) (continued) SETTING FACTOR SETTING FACTOR SETTING FACTOR |
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