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EMC1187 数据表(PDF) 20 Page - Microchip Technology |
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EMC1187 数据表(HTML) 20 Page - Microchip Technology |
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20 / 47 page ![]() Triple Channel 1°C Temperature Sensor with Hardware Thermal Shutdown and 1.8V SMBus Communications Datasheet Revision 1.0 (07-11-13) 20 SMSC EMC1187 DATASHEET 5.5 ALERT Output The ALERT pin is an open drain output and requires a pull-up resistor to VDD and has two modes of operation: interrupt mode and comparator mode. The mode of the ALERT output is selected via the ALERT / COMP bit in the Configuration Register (see Section 6.4). 5.5.1 ALERT Pin Interrupt Mode When configured to operate in interrupt mode, the ALERT pin asserts low when an out of limit measurement (> high limit or < low limit) is detected on any diode or when a diode fault is detected, functioning as any standard ALERT in on the SMBus. The ALERT pin will remain asserted as long as an out-of-limit condition remains. Once the out-of-limit condition has been removed, the ALERT pin will remain asserted until the appropriate status bits are cleared. The ALERT pin can be masked by setting the MASK_ALL bit. Once the ALERT pin has been masked, it will be de-asserted and remain de-asserted until the MASK_ALL bit is cleared by the user. Any interrupt conditions that occur while the ALERT pin is masked will update the Status Register normally. There are also individual channel masks (see Section 6.12). The ALERT pin is used as an interrupt signal or as an SMBus Alert signal that allows an SMBus slave to communicate an error condition to the master. One or more ALERT outputs can be hard-wired together. 5.5.2 ALERT Pin Comparator Mode When the ALERT pin is configured to operate in comparator mode, it will be asserted if any of the measured temperatures exceeds the respective high limit. The ALERT pin will remain asserted until all temperatures drop below the corresponding high limit minus the Therm Hysteresis value. When the ALERT pin is asserted in comparator mode, the corresponding high limit status bits will be set. Reading these bits will not clear them until the ALERT pin is deasserted. Once the ALERT pin is deasserted, the status bits will be automatically cleared. The MASK_ALL bit will not block the ALERT pin in this mode; however, the individual channel masks (see Section 6.12) will prevent the respective channel from asserting the ALERT pin. 5.6 ALERT and SYS_SHDN Pin Considerations Because of the decode method used to determine the Hardware Thermal Shutdown Limit, it is important that the pull-up resistance on both the ALERT and SYS_SHDN pins be within the tolerances shown in Table 5.2. Additionally, the pull-up resistor on the ALERT and SYS_SHDN pins must be connected to the same 3.3V supply that drives the VDD pin. For 15ms after power up, the ALERT and SYS_SHDN pins must not be pulled low or the Hardware Thermal Shutdown Limit will not be decoded properly. If the system requirements do not permit these conditions, the ALERT and SYS_SHDN pins must be isolated from their respective busses during this time. One method of isolating the ALERT pin is shown in Figure 5.3. |
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