ADE3050 datasheet(42/88 Pages) STMICROELECTRONICS

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Data Mux Block

ADE3XXX

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2.11

Data Mux Block

Data mux provides the following functions:

selection of one among three data sources

debug modes (e.g. bit order swap, color swap)

2.12

Data Measurement Block

The Data Measurement module measures several characteristics of the data and sync signals.

Data measurements are taken over a programmable window as defined by an upper left (mix_x,

min_y) and a lower right (max_x, max_y), which may be the whole frame. Measurements are

programmable either per color channel or over all color channels.

This module computes all measurements of sync and data format that are done in the INCLK

domain. The Sync Measurement module does measurements in the XCLK domain. The INCLKs

per DE measurement does not use the window feature. It measures the number of INCLK per DE

and returns the result for every line.

All unused or reserved bits return as zero.

Windows are relative to Sync pulses. A window defined from (0,0) - (0xFFF, 0xFFF) goes from sync

to sync. The reference edge to use, rising or falling, is also programmable per X and Y coordinates.

Configure SMUX to provide a positive polarity sync to the DMEAS block. All window enables reset

at 0 and always reset on the rising or falling edge of sync.

See the description of the specific PHM and DMM measurements performed within DMEAS here

below. Most algorithms are run over separate or all color channels. Most algorithms also contain a

threshold value to zero out noise and / or amplify edges. Algorithm, Color, Threshold, or Window

Control changes are accepted at the end of a valid measurement, the current measurement in

progress is not affected.

Software requests measurements in one of two ways:

One shot - synchronous with respect to the microcontroller.

Free Run - asynchronous with respect to the microcontroller.

Table 15: Data Mux Registers

Addr.

Mode

Bits

Default

Description

DMUX_CHANSEL

0x0280

[7]

0x0

Reserved

R/W

[6]

0x0

0: normal

1: msb/lsb byte flip

R/W

[5:3]

0x0

If enabled by [2]

0x0: Reserved

0x1: R & G bytes are swapped

0x2: B & G bytes are swapped

0x3: R => G, G => B, B => R

0x4: R & B bytes are swapped

0x5: R => B, G => R, B => G

0x0, 0x6-0x7: Reserved

R/W

[2]

0x0

0: normal

1: enable color swap

R/W

[1:0]

0x0

Video Source Select

0x0: ADC data

0x1: YUV data

0x2: DVI data

0x3: DVI xor YUV xor ADC (for test only)

ADE3050 数据表(PDF) 42 Page - STMicroelectronics

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