+

±IN

+IN

V±

VS+

GND

VS±

GND

VOUT

Run the input traces

as far away from

the supply lines

as possible.

Use a low-ESR,

ceramic bypass

capacitor.

Place components

close to the device

and to each other to

reduce parasitic

errors.

Use a low-ESR,

ceramic bypass

capacitor.

OUT

V+

Copyright © 2016, Texas Instruments Incorporated

20

TLV6001, TLV6002, TLV6004

SBOS779B – JUNE 2016 – REVISED OCTOBER 2016

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Product Folder Links: TLV6001 TLV6002 TLV6004

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Copyright © 2016, Texas Instruments Incorporated

11 Layout

11.1 Layout Guidelines

For best operational performance of the device, use good printed circuit board (PCB) layout practices, including:

•

Noise may propagate into analog circuitry through the power pins of the circuit and the operational

amplifier. Use bypass capacitors to reduce the coupled noise by providing low-impedance power sources

local to the analog circuitry.

–

Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as

close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single-

supply applications.

•

Separate grounding for analog and digital portions of the circuitry is one of the simplest and most

effective methods of noise suppression. One or more layers on multilayer PCBs are typically devoted to

ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Take care to

physically separate digital and analog grounds, paying attention to the flow of the ground current. For

more detailed information, refer to Circuit Board Layout Techniques (SLOA089).

•

To reduce parasitic coupling, run the input traces as far away from the supply or output traces as

possible. If the traces cannot be kept separate, crossing the sensitive trace perpendicularly is much better

than crossing in parallel with the noisy trace.

•

input in order to minimize parasitic capacitance, as shown in Figure 25.

•

Keep the length of input traces as short as possible. Remember that the input traces are the most

sensitive part of the circuit.

•

Consider a driven, low-impedance guard ring around the critical traces. A guard ring may significantly

reduce leakage currents from nearby traces that are at different potentials.

11.2 Layout Example

Figure 25. Operational Amplifier Board Layout for Noninverting Configuration

Figure 26. Schematic Representation of Figure 25