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L6712A L6712

PIN FUNCTION

N. (*)

Name

Description

SO

VFQFPN

1

33

LGATE1

Channel 1 LS driver output.

A little series resistor helps in reducing device-dissipated power.

2

34

VCCDR

LS drivers supply: it can be varied from 5V to 12V buses.

Filter locally with at least 1

µF ceramic cap vs. PGND.

3

35

PHASE1

Channel 1 HS driver return path. It must be connected to the HS1 mosfet source

and provides the return path for the HS driver of channel 1.

4

36

UGATE1

Channel 1 HS driver output.

A little series resistor helps in reducing device-dissipated power.

5

2

BOOT1

Channel 1 HS driver supply. This pin supplies the relative high side driver.

Connect through a capacitor (100nF typ.) to the PHASE1 pin and through a diode

to VCC (cathode vs. boot).

6

4

VCC

Device supply voltage. The operative supply voltage is 12V ±10%.

Filter with 1

µF (Typ.) capacitor vs. GND.

7

5,6

SGND

All the internal references are referred to this pin. Connect it to the PCB signal

ground.

8

7

COMP

This pin is connected to the error amplifier output and is used to compensate the

control feedback loop.

9

8

FB

This pin is connected to the error amplifier inverting input and is used to

compensate the control feedback loop.

10

9

DROOP

A current proportional to the sum of the current sensed in both channel is

sourced from this pin (50

µA at full load, 70µA at the Constant Current threshold).

Short to FB to implement the Droop effect: the resistor connected between FB

and VSEN (or the regulated output) allows programming the droop effect.

Otherwise, connect to GND directly or through a resistor (43k

Ω max) and filter

with 1nF capacitor. In this last case, current information can be used for other

purposes.

11

11

REF_IN /

OUT

Reference input/output. Filter vs. GND with 1nF ceramic capacitor (a total of

100nF capacitor is allowed).

It reproduces the reference used for the regulation following VID code: when

VID=111, the reference for the regulation must be connected on this pin.

References ranging from 0.800V up to 3.300V can be accepted.

12

12

VSEN

Connected to the output voltage it is able to manage Over & Under-voltage

conditions and the PGOOD signal. It is internally connected with the output of the

Remote Sense Amplifier for Remote Sense of the regulated voltage.

Connecting 1nF capacitor max vs. GND can help in reducing noise injection at

this pin.

If no Remote Sense is implemented, connect it directly to the regulated voltage in

order to manage OVP, UVP and PGOOD.

13

13

ISEN1

Channel 1 current sense pin. The output current may be sensed across a sense

low-side mosfet drain or to the sense resistor through a resistor Rg.

The net connecting the pin to the sense point must be routed as close as

possible to the PGNDS net in order to couple in common mode any picked-up

noise.

14

14

PGNDS1

Channel 1 Power Ground sense pin. The net connecting the pin to the sense

point must be routed as close as possible to the ISEN1 net in order to couple in

common mode any picked-up noise.

15

15

PGNDS2

Channel 2 Power Ground sense pin. The net connecting the pin to the sense

point must be routed as close as possible to the ISEN2 net in order to couple in

common mode any picked-up noise.