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OMAP3530ECUS72 数据表(PDF) 36 Page - Texas Instruments

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部件名 OMAP3530ECUS72
功能描述  OMAP3530 and OMAP3525 Applications Processors
PDF  265 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

OMAP3530ECUS72 数据表(HTML) 36 Page - Texas Instruments

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OMAP3530, OMAP3525
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
www.ti.com
Table 2-1. Ball Characteristics (CBB Pkg.)(1) (continued)
BALL
BALL TOP
PIN NAME
MODE [4]
TYPE [5]
BALL
BALL
RESET REL. POWER [9]
HYS [10]
BUFFER
PULLUP
IO CELL [13]
BOTTOM [1] [2]
[3]
RESET
RESET REL. MODE [8]
STRENG TH /DOWN
STATE [6]
STATE [7]
(mA) [11]
TYPE [12]
AE2
NA
mmc2_clk
0
O
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mcspi3_clk
1
IO
gpio_130
4
IO
safe_mode
7
AG5
NA
mmc2_ cmd
0
IO
H
H
7
vdds
Yes
4
PU/ PD
LVCMOS
mcspi3_
1
IO
simo
gpio_131
4
IO
safe_mode
7
AH5
NA
mmc2_ dat0
0
IO
H
H
7
vdds
Yes
4
PU/ PD
LVCMOS
mcspi3_
1
IO
somi
gpio_132
4
IO
safe_mode
7
AH4
NA
mmc2_ dat1
0
IO
H
H
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_133
4
IO
safe_mode
7
AG4
NA
mmc2_ dat2
0
IO
H
H
7
vdds
Yes
4
PU/ PD
LVCMOS
mcspi3_cs1
1
O
gpio_134
4
IO
safe_mode
7
AF4
NA
mmc2_ dat3
0
IO
H
H
7
vdds
Yes
4
PU/ PD
LVCMOS
mcspi3_cs0
1
IO
gpio_135
4
IO
safe_mode
7
AE4
NA
mmc2_ dat4
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mmc2_dir_da 1
O
t0
mmc3_dat0
3
IO
gpio_136
4
IO
safe_mode
7
AH3
NA
mmc2_ dat5
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mmc2_dir_da 1
O
t1
cam_global_r 2
IO
eset
mmc3_dat1
3
IO
gpio_137
4
IO
hsusb3_tll_st 5
IO
p
mm3_rxdp
6
IO
safe_mode
7
AF3
NA
mmc2_ dat6
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mmc2_dir_
1
O
cmd
cam_ shutter 2
O
mmc3_dat2
3
IO
gpio_138
4
IO
hsusb3_tll_di 5
IO
r
safe_mode
7
AE3
NA
mmc2_ dat7
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mmc2_ clkin 1
I
mmc3_dat3
3
IO
gpio_139
4
IO
hsusb3_tll_n 5
IO
xt
mm3_rxdm
6
IO
36
TERMINAL DESCRIPTION
Copyright © 2008–2013, Texas Instruments Incorporated
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Product Folder Links: OMAP3530 OMAP3525



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