FT51CS-R datasheet(42/43 Pages) FTDI

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FT51A Advanced MCU with 8051 Compatible Core IC Datasheet

Version 1.5

Doc ument N o.: FT _000877

C learance N o.: FT DI#420

Address

Description

(0xDD)

DMA_CURR_CNT_U_3

IO DMA Current Byte Count Register

(Upper Bits)

(0xDE)

DMA_FIFO_DATA_3

IO DMA FIFO DATA

(0xDF)

DMA_AFULL_TRIGGER_3

IO DMA Almost Full Flag Trigger Value

(0xE0)

DMA_CONTROL_4

DMA Control Register

(0xE1)

DMA_ENABLE_4

IO DMA Enable Register

(0xE2)

DMA_IRQ_ENA_4

DMA IO Interrupt Enable & Control

(0xE3)

DMA_IRQ_4

DMA IO Interrupt Register

(0xE4)

DMA_SRC_MEM_ADDR_L_4

DMA IO Source Mem Addr Register

(Lower Bits)

(0xE5)

DMA_SRC_MEM_ADDR_U_4

DMA IO Source Mem Addr Register

(Upper Bits)

(0xE6)

DMA_DEST_MEM_ADDR_L_4

DMA IO Destination Mem Addr Register

(Lower Bits)

(0xE7)

DMA_DEST_MEM_ADDR_U_4

DMA IO Destination Mem Addr Register

(Upper Bits)

(0xE8)

DMA_IO_ADDR_L_4

DMA IO Addr Register (Lower Bits)

(0xE9)

DMA_IO_ADDR_U_4

IO DMA IO Addr Register (Upper Bits)

(0xEA)

DMA_TRANS_CNT_L_4

IO DMA Transfer Byte Count Register

(Lower Bits)

(0xEB)

DMA_TRANS_CNT_U_4

IO DMA Transfer Byte Count Register

(Upper Bits)

(0xEC)

DMA_CURR_CNT_L_4

IO DMA Current Byte Count Register

(Lower Bits)

(0xED)

DMA_CURR_CNT_U_4

IO DMA Current Byte Count Register

(Upper Bits)

(0xEE)

DMA_FIFO_DATA_4

IO DMA FIFO DATA

(0xEF)

DMA_AFULL_TRIGGER_4

IO DMA Almost Full Flag Trigger Value

(0x100)

AIO_CONTROL

AIO Control Register

(0x101)

AIO_GLOBAL_CTRL

AIO Global Control Register

(0x102)

(0x105)

AIO _MODE_0

AIO _MODE_3

Mode Select for AIO pins 0-15.

(0x108)

AIO_SAMPLE_0

Initiates a SAMPLE of AIO 0 to 7

(0x109)

AIO_SAMPLE_1

Initiates a SAMPLE of AIO 8 to 15

(0x10A)

(0x10B)

AIO_GLOBAL_PORT_SELECT_0_7

Selects the AIOs to be included in a

Global function

(0x10C)

AIO_GLOBAL_PORT_SELECT_8_15

Selects the AIOs to be included in a

Global function

(0x13E)

(0x15D)

AIO_0_ADC_DATA_L

AIO_15_ADC_DATA_U

Sampled ADC data for AIO0 to AIO15

(0x16E)

AIO_INTERRUPT_0_7

Interrupt status for ports 0-7

(0x16F)

AIO_INT_ENABLE_0_7

Interrupt enable for ports 0-7

(0x170)

AIO_INTERRUPT_8_15

Interrupt status for ports 8-15

(0x171)

AIO_INT_ENABLE_8_15

Interrupt enable for ports 8-15

(0x176)

AIO_SH_COUNTER_L

Sample&Hold Settling time counter,

lower 8 bits

(0x177)

AIO_SH_COUNTER_U

Sample&Hold Settling time, upper 2

bits

(0x17A)

AIO_CLOCK_DIVIDER

Clock Divider

Table 0-1 – IO Registers

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