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SC16C652 数据表(PDF) 3 Page - NXP Semiconductors |
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SC16C652 数据表(HTML) 3 Page - NXP Semiconductors |
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3 / 41 page  Philips Semiconductors SC16C652 Dual UART with 32 bytes of transmit and receive FIFOs Product data Rev. 04 — 20 June 2003 3 of 41 9397 750 11634 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 4. Block diagram Fig 1. SC16C652 block diagram. TRANSMIT FIFO REGISTER TXA, TXB RECEIVE SHIFT REGISTER RECEIVE FIFO REGISTER RXA, RXB SC16C652 TRANSMIT SHIFT REGISTER MODEM CONTROL LOGIC DTRA, DTRB RTSA, RTSB OP2A, OP2B CLOCK AND BAUD RATE GENERATOR CTSA, CTSB RIA, RIB CDA, CDB DSRA, DSRB XTAL2 XTAL1 DATA BUS AND CONTROL LOGIC D0–D7 IOR IOW RESET A0–A2 CSA CSB REGISTER SELECT LOGIC INTA, INTB TXRDYA, TXRDYB RXRDYA, RXRDYB INTERRUPT CONTROL LOGIC 002aaa348 |
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