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STW5094 数据表(PDF) 22 Page - STMicroelectronics

部件名 STW5094
功能描述  18 BIT 8kHz TO 48kHz LOW POWER STEREO AUDIO DAC WITH INTEGRATED POWER AMPLIFIERS AND VOICE CODEC
PDF  37 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STW5094 数据表(HTML) 22 Page - STMicroelectronics

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ABSOLUTE MAXIMUM RATINGS
OPERATIVE SUPPLY VOLTAGES
TIMING SPECIFICATIONS (unless otherwise specified, VCCIO = 1.8V to 3.3V,Tamb = -30°C to 85°C; typical
characteristics are specified at VCCIO =3.0V, Tamb = 25 °C; all signals are referenced to GND, see next Note
for timing definitions)
NOTICE: All timing specifications subject to change.
OCK and Audio Interface Signals Timing
MCLK and AUXCLK Timing
Parameter
Value
Unit
VCC to GND
4.6
V
Voltage at MIC (VCC ≤ 3.3V)
VCC +0.5 to GND -0.5
V
Current at LSP/N
± 240
mA
Current at HPR,HPL
± 100
mA
Current at any digital output
± 50
mA
Voltage at any digital input (VCCIO ≤ 3.3V); limited at ± 50mA
VCCIO + 0.5 to GND -0.5
V
Storage temperature range
- 65 to + 150
°C
Symbol
Min.
Max.
Unit
VCC =VCCA =VCCP
2.7
3.3
V
VCCIO
1.8
VCC
V
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
fOCK
Frequency of OCK
(frequency depends on the
selected Audio sample rate in
CR6)
Audio Fs 8kHz or 16kHz
Audio Fs 11.025kHz or 22.05kHz
Audio Fs 12kHz or 24kHz
Audio Fs 32kHz
Audio Fs 44.1kHz
Audio Fs 48kHz
4.096
5.6648
6.144
8.192
11.2896
12.288
MHz
MHz
MHz
MHz
MHz
MHz
tHOCK
Period of OCK high
Measured from VIH to VIH
35
ns
tLOCK
Period of OCK low
Measured from VIL to VIL
35
ns
tDAI
Delay of SCK,SDI and LRCK from
OCK active edge
020
ns
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
fMCLK
Frequency of MCLK, AUXCLK
Frequency is programmable with
bits F in CR0
512
1.536
2.048
2.560
kHz
MHz
MHz
MHz
tWMH
Period of MCLK, AUXCLK high
Measured from VIH to VIH
150
ns
tWML
Period of MCLK, AUXCLK low
Measured from VIL to VIL
150
ns
tRM
Rise Time of MCLK, AUXCLK
Measured from VIL to VIH
30
ns
tFM
Fall Time of MCLK, AUXCLK
Measured from VIH to VIL
30
ns



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