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LT6552CS8 数据表(PDF) 5 Page - Linear Technology |
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LT6552CS8 数据表(HTML) 5 Page - Linear Technology |
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5 / 16 page ![]() LT6552 5 6552f SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage Both Inputs (Note 7) 10 25 mV q 30 mV ∆VOS/∆T Input VOS Drift q 50 µV/°C IB Input Bias Current Any Input q 25 50 µA IOS Input Offset Current Either Input Pair q 15 µA en Input Noise Voltage Density f = 10kHz 55 nV/ √Hz in Input Noise Current Density f = 10kHz 0.7 pA/ √Hz RIN Input Resistance Common Mode, VCM = –5V to 3V 300 k Ω CMRR Common Mode Rejection Ratio VCM = –5V to 3V q 58 75 dB Input Range q –5 3 V PSRR Power Supply Rejection VS = ±2V to ±6V, VCM = 0V q 48 54 dB GE Gain Error VO = –3V to 3V, RL = 1k q 13 % RL = 150Ω q 13 % Output Voltage Swing (VDIFF = ± 0.6V), VREF (Pin 1) = 0V, AV = 10 RL = 1k q ±4.8 ±4.875 V RL = 150Ω q ±3.6 ±4.3 V RL = 75Ω, 0°C ≤ TA ≤ 70°C (Only) q ±2.75 ±3.4 V SR Slew Rate VCM = 0V, VDIFF = –1.5V to +1.5V, 400 600 V/ µs VO = –5V to 5V Measure from –2V to 2V, RL = 150Ω FPBW Full-Power Bandwidth VO = 6VP-P (Note 9) 30 MHz BW Small-Signal –3dB Bandwidth AV = 2, RL = 150Ω 75 MHz tr, tf Rise Time, Fall Time AV = 50, VO = –3V to 3V, 20% to 80% 125 175 ns tS Settling Time to 3% AV = 2, ∆VOUT = 6V, Positive Step 25 ns Settling Time to 1% RL = 150Ω 35 ns Differential Gain AV = 2, RL = 150Ω, Output Black Level = 0V 0.2 % Differential Phase AV = 2, RL = 150Ω, Output Black Level = 0V 0.15 Deg ISC Short-Circuit Current VOUT = 0V, VDIFF = ±1V 50 70 mA 0 °C ≤ TA ≤ 70°C q 45 mA –40 °C ≤ TA ≤ 85°C q 35 mA Supply Current Shutdown VSHDN = –4.5V q 650 1400 µA IS Supply Current 14 16.5 mA q 18.5 mA VL Shutdown Pin Input Low Voltage q –4.5 V VH Shutdown Pin Input High Voltage q 4.7 V ±5V ELECTRICAL CHARACTERISTICS 5V ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS tON Turn-On Time VSHDN from 0.5V to 4.7V 250 ns tOFF Turn-Off Time VSHDN from 4.7V to 0.5V 450 ns Shutdown Output Leakage Current VSHDN = 0.5V, 0V ≤ VOUT ≤ V+ q 0.25 µA The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 5V, 0V. Figure 1 shows the DC test circuit, VREF = VCM = 1V, VDIFF = 0V, VSHDN = V +, unless otherwise noted. RL = RF + RG = 1k. (Note 6) The q denotes the specifications which apply over the full operat- ing temperature range, otherwise specifications are at TA = 25°C. VS = ±5V. Figure 2 shows the DC test circuit, VREF = VCM = 0V, VDIFF = 0V, VSHDN = V+, unless otherwise noted. RL = RF + RG = 1k. (Note 6) |
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