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LT6552CS8 数据表(PDF) 6 Page - Linear Technology |
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LT6552CS8 数据表(HTML) 6 Page - Linear Technology |
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6 / 16 page ![]() LT6552 6 6552f SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Shutdown Pin Current VSHDN = –4.5V q 85 250 µA VSHDN = 4.7V q 310 µA tON Turn-On Time VSHDN from – 4.5V to 4.7V 200 ns tOFF Turn-Off Time VSHDN from 4.7V to –4.5V 400 ns Shutdown Output Leakage Current VSHDN = –4.5V, V– ≤ VOUT ≤ V+ q 0.25 µA The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ±5V. Figure 2 shows the DC test circuit, VREF = VCM = 0V, VDIFF = 0V, VSHDN = V +, unless otherwise noted. RL = RF + RG = 1k. (Note 6) ±5V ELECTRICAL CHARACTERISTICS Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The inputs are protected from ESD with diodes to the supplies. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum. Note 4: The LT6552C/LT6552I are guaranteed functional over the temperature range of –40 °C to 85°C. Note 5: The LT6552C is guaranteed to meet specified performance from 0 °C to 70°C and is designed, characterized and expected to meet specified performance from –40 °C to 85°C, but is not tested or QA sampled at these temperatures. The LT6552I is guaranteed to meet specified performance from – 40 °C to 85°C. Note 6: When RL = 1k is specified, the load resistor is RF + RG, but when RL = 150Ω or RL = 75Ω is specified, then an additional resistor of that value is added to the output. Note 7: VOS measured at the output (Pin 6) is the contribution from both input pairs and is input referred. Note 8: Minimum supply is guaranteed by the PSRR test. Note 9: Full power bandwidth is calculated from the slew rate. FPBW = SR/2 πVp Note 10: VS = 3.3V, tr and tf limits are guaranteed by correlation to VS = 5V and ±5V tests. Figure 1. 3.3V, 5V DC Test Circuit Figure 2. ±5V DC Test Circuit REF –IN +IN V– FB V+ OUT SHDN + – + – – + + – + – VDIFF VREF VCM VSHDN V+ RG 100 Ω 0.1% RF 900 Ω 0.1% RL 6552 F01 1 µF REF –IN +IN V– FB V+ OUT SHDN + – + – + – VDIFF VCM VSHDN V+ V– RG 100 Ω 0.1% RF 900 Ω 0.1% RL 6552 F02 1 µF 1 µF |
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