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STM32F303RE 数据表(PDF) 113 Page - STMicroelectronics |
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STM32F303RE 数据表(HTML) 113 Page - STMicroelectronics |
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113 / 173 page  DocID026415 Rev 5 113/173 STM32F303xD STM32F303xE Electrical characteristics 151 NAND controller waveforms and timings Figure 34 and Figure 35 present the NAND controller synchronous waveforms, and Table 59 and Table 60 provide the corresponding timings. The results shown in this table are obtained with the following FSMC configuration: • COM.FMC_SetupTime = 0x01; • COM.FMC_WaitSetupTime = 0x03; • COM.FMC_HoldSetupTime = 0x02; • COM.FMC_HiZSetupTime = 0x03; • ATT.FMC_SetupTime = 0x01; • ATT.FMC_WaitSetupTime = 0x03; • ATT.FMC_HoldSetupTime = 0x02; • ATT.FMC_HiZSetupTime = 0x03; • Bank = FMC_Bank_NAND; • MemoryDataWidth = FMC_MemoryDataWidth_16b; • ECC = FMC_ECC_Enable; • ECCPageSize = FMC_ECCPageSize_512Bytes; • TCLRSetupTime = 0; • TARSetupTime = 0. In all timing tables, the THCLK is the HCLK clock period. Figure 34. NAND controller read timings |
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