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DS00002256A-page 11

USB2227/USB2228

XTAL1/

CLKIN

102

ICLKx

Crystal Input/External Clock Input:

24Mhz Crystal or external clock input.

This pin can be connected to one terminal of the crystal or can

be connected to an external 24Mhz clock when a crystal is not

used.

Note:

The MA[2:0] pins will be sampled while nRESET is

asserted, and the value will be latched upon nRESET

negation. This will determine the clock source and

value.

XTAL2

103

OCLKx

Crystal Output:

24Mhz Crystal

This is the other terminal of the crystal, or left open when an

external clock source is used to drive XTAL1/CLKIN. It may not

be used to drive any external circuitry other than the crystal

circuit.

Memory I/O Interface

MD[7:0]

12

11

10

9

8

7

6

5

I/O8PU

Memory Data Bus:

When ROMEN bit of GPIO_IN1 register = 0, these signals are

used to transfer data between the internal CPU and the external

program memory.

These pins have internally controlled weak pull-up resistors.

MA[15:3]

4

2

1

128

127

126

125

124

123

122

121

120

119

O8

Memory Address Bus:

These signals address memory locations within the external

memory.

MA2/

SEL_CLKDRV

118

I/O8PD

Memory Address Bus:

MA2 Addresses memory locations within the external memory.

SEL_CLKDRV. During nRESET assertion, this pins will select the

operating clock mode (crystal or externally driven clock source),

and a weak pull-down resistor is enabled. When nRESET is

negated, the value will be internally latched and this pin will revert

to MA2 functionality, the internal pull-down will be disabled.

‘0’ = Crystal operation (24MHz only)

‘1’ = Externally driven clock source (24MHz or 48MHz)

Note:

If the latched value is ‘1’, then the MA2 pin is tri-stated

when the following conditions are true:

1. IDLE bit (PCON.0) is 1.

2. INT2 is negated

3. SLEEP bit of CLOCK_SEL is 1.

If the latched value is ‘0’, then the MA2 pin will function identically

to the MA[15:3] pins at all times (other than during nRESET

assertion).

Symbol

128-Pin

VTQFP

Buffer Type

Description