USB82640 datasheet(12/64 Pages) MICROCHIP

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USB82640

DS60001312A-page 12

 2010-2015 Microchip Technology Inc.

XTAL2

OCLKx

24 MHz Crystal Output

This is the other terminal of the crystal, or a no

connect pin, when an external clock source is

used to drive XTAL1 (CLKIN).

N/A

Note:

Leave it open,

when an exter-

nal clock source

is used to drive

XTAL1 (CLKIN).

VDD18PLL

1.8 V PLL Power Bypass

This pin is the 1.8 V power bypass for the PLL.

This pin requires an external bypass capacitor

of 1.0 µF.

If REG_EN is low, this pin serves as a power

supply (1.8 V) for the device.

VDDA33

3.3 V Analog Power

• Pin 48 requires an external bypass capaci-

tor of 4.7 µF.

SPI Interface

SPI_CE_N

O12

SPI Chip Enable

This is the active low chip enable output. If the

SPI interface is enabled, drive this pin high in

power down states.

Leave open

SPI_CLK/

I/O12

SPI Clock

This is the SPI clock out to the serial ROM. See

Section 5.4, "ROM BOOT Sequence" for dia-

gram and usage instructions.

During reset, this pin is driven low.

Leave open

SCL

When configured, this is the I²C EEPROM clock

pin.

Leave open

TABLE 5-1:

USB82640 PIN DESCRIPTIONS (CONTINUED)

Symbol

48-Pin

VQFN

Buffer

Type

Description

If Pins not Used

Connection

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