USB2524 datasheet(38/58 Pages) MICROCHIP

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USB2524

DS00001588B-page 38

 2013 - 2016 Microchip Technology Inc.

A Block Read differs from a block write in that the repeated start condition exists to satisfy the I2C specification's require-

ment for a change in the transfer direction.

TABLE 7-3:

SMBUS BLOCK READ

7.3.2

INVALID PROTOCOL RESPONSE BEHAVIOR

Registers that are accessed with an invalid protocol are not updated. A register is only updated following a valid protocol.

The only valid protocols are Write Block and Read Block, which are described above.

The Hub only responds to the hardware selected Slave Address. Attempting to communicate with the Hub over SMBus

with an invalid slave address or invalid protocol results in no response, and the SMBus Slave Interface returns to the

idle state. The only valid registers that are accessible by the SMBus slave address are the registers defined in the Reg-

isters Section. See Undefined Registers for the response to undefined registers.

7.3.3

GENERAL CALL ADDRESS RESPONSE

The Hub does not respond to a general call address of 0000_000b.

7.3.4

SLAVE DEVICE TIME-OUT

According to the SMBus Specification, V1.0 devices in a transfer can abort the transfer in progress and release the bus

when any single clock low interval exceeds 25ms (TTIMEOUT, MIN). Devices that have detected this condition must reset

their communication and be able to receive a new START condition no later than 35ms (TTIMEOUT, MAX).

7.3.5

STRETCHING THE SCLK SIGNAL

The Hub supports stretching of the SCLK by other devices on the SMBus. The Hub does not stretch the SCLK.

7.3.6

SMBUS TIMING

The SMBus Slave Interface complies with the SMBus AC Timing Specification. See the SMBus timing in the “Timing

Diagram” section.

7.3.7

BUS RESET SEQUENCE

The SMBus Slave Interface resets and returns to the idle state upon a START field followed immediately by a STOP

field.

7.3.8

SMBUS ALERT RESPONSE ADDRESS

The SMBALERT# signal is not supported by the Hub.

7.3.8.1

Undefined Registers

Reads to undefined registers return 00h. Writes to undefined registers have no effect and do not return an error.

Note:

Some simple devices do not contain a clock low drive circuit; this simple kind of device typically resets its

communications port after a start or stop condition. The Slave Device Time-Out must be implemented.

Block Read

Slave Address

Byte Count = N

Data byte 1

Data byte 2

Data byte N

...

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