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USB2524 数据表(PDF) 11 Page - Microchip Technology |
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USB2524 数据表(HTML) 11 Page - Microchip Technology |
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11 / 58 page ![]() 2013 - 2016 Microchip Technology Inc. DS00001588B-page 11 USB2524 1 0 0 Internal Default Configuration • PRT_ASSIGN[3:0] = Peripheral Mode (Edge Triggered) • LED Mode = Host Ownership Mode •Strap • options on pins LED_A[4:1]_N are enabled. • Supports unassigned Ports 1 0 1 Internal Default Configuration • PRT_ASSIGN[3:0] = Peripheral Mode (Edge Triggered) • LED Mode = Host Ownership & Port Speed Mode • Strap options on pins LED_A[4:1]_N are disabled • Supports unassigned Ports. 110 Reserved 111 Reserved TABLE 4-3: MISCELLANEOUS PINS Name Symbol Type Function Crystal Input/External Clock Input XTAL1/ CLKIN ICLKx 24MHz crystal or external clock input. This pin connects to either one terminal of the crystal or to an external 24MHz clock when a crystal is not used. Note: See Table 11-1 for the required logic voltage levels of this pad if it will be driven by an exter- nal clock source. Crystal Output XTAL2 OCLKx 24MHz Crystal This is the other terminal of the crystal, or left unconnected when an external clock source is used to drive XTAL1/CLKIN. It must not be used to drive any external circuitry other than the crystal circuit. RESET Input RESET_N IS This active low signal is used by the system to reset the chip. The minimum active low pulse is 1us. Self-Power / Bus-Power Detect SELF_PWR I Detects availability of local self-power source. Low = Self/local power source is NOT available (i.e., Hub gets all power from Upstream USB VBus). High = Self/local power source is available. TEST Pin TEST IPD Used for testing the chip. User must treat as a no- connect or connect to ground. TABLE 4-2: SMBUS OR EEPROM INTERFACE BEHAVIOR (CONTINUED) Name Name Name Function |
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