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MCP79400 数据表(PDF) 11 Page - Microchip Technology |
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MCP79400 数据表(HTML) 11 Page - Microchip Technology |
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11 / 62 page ![]() 2011-2016 Microchip Technology Inc. DS20005009F-page 11 MCP79400/MCP79401/MCP79402 5.0 FUNCTIONAL DESCRIPTION The MCP7940X is a highly-integrated Real-Time Clock/Calendar (RTCC). Using an on-board, low-power oscillator, the current time is maintained in seconds, minutes, hours, day of week, date, month, and year. The MCP7940X also features 64 bytes of general purpose SRAM and eight bytes of protected EEPROM. Two alarm modules allow interrupts to be generated at specific times with flexible comparison options. Digital trimming can be used to compensate for inaccuracies inherent with crystals. Using the backup supply input and an integrated power switch, the MCP7940X will automatically switch to backup power when primary power is unavailable, allowing the current time and the SRAM contents to be maintained. The time-stamp module captures the time when primary power is lost and when it is restored. The RTCC configuration and status registers are used to access all of the modules featured on the MCP7940X. 5.1 Memory Organization The MCP7940X features three different blocks of memory: the RTCC registers, general purpose SRAM, and protected EEPROM. The RTCC registers and SRAM share the same address space, accessed through the ‘1101111X’ control byte. The protected EEPROM is in a separate address space and is accessed using the ‘1010111X’ control byte (Figure 5-1). Unused locations are not accessible. The MCP7940X will not acknowledge if the address is out of range, as shown in the shaded region of the memory map in Figure 5-1. The RTCC registers are contained in addresses 0x00-0x1F. Table 5-1 shows the detailed RTCC register map. There are 64 bytes of user-accessible SRAM, located in the address range 0x20-0x5F. The SRAM is a separate block from the RTCC registers. All RTCC registers and SRAM locations are maintained while operating from backup power. The protected EEPROM section is located in addresses 0xF0-0xF7. FIGURE 5-1: MEMORY MAP Time and Date SRAM (64 Bytes) Power-Fail Time-Stamp Alarm 1 Alarm 0 Configuration and Trimming 0x00 0x06 0x07 0x09 0x0A 0x10 0x11 0x17 0x18 0x1F 0x20 0x5F 0x60 0xFF Unimplemented; device does not ACK I2C Address: 1101111x RTCC Registers/SRAM Protected EEPROM (8 Bytes) 0x00 0xEF 0xF0 0xF7 0xF8 0xFF Unimplemented; device does not ACK I2C Address: 1010111x EEPROM EUI-48/EUI-64 Node Address Unimplemented; device does not ACK |
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