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L6986 数据表(PDF) 49 Page - STMicroelectronics |
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L6986 数据表(HTML) 49 Page - STMicroelectronics |
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49 / 68 page ![]() DocID025376 Rev 7 49/68 L6986 Application notes 68 6.6 Design of the power components 6.6.1 Input capacitor selection The input capacitor voltage rating must be higher than the maximum input operating voltage of the application. During the switching activity a pulsed current flows into the input capacitor and so its RMS current capability must be selected accordingly with the application conditions. Internal losses of the input filter depends on the ESR value so usually low ESR capacitors (like multilayer ceramic capacitors) have higher RMS current capability. On the other hand, given the RMS current value, lower ESR input filter has lower losses and so contributes to higher conversion efficiency. The maximum RMS input current flowing through the capacitor can be calculated as: Equation 44 Where IO is the maximum DC output current, D is the duty cycles, is the efficiency. This function has a maximum at D = 0.5 and, considering = 1, it is equal to Io/2. In a specific application the range of possible duty cycles has to be considered in order to find out the maximum RMS input current. The maximum and minimum duty cycles can be calculated as: Equation 45 Equation 46 Where VHIGH_SIDE and VLOW_SIDE are the voltage drops across the embedded switches. The peak to peak voltage across the input filter can be calculated as: Equation 47 In case of negligible ESR (MLCC capacitor) the equation of CIN as a function of the target VPP can be written as follows: Equation 48 Considering this function has its maximum in D = 0.5: IRMS IOUT 1 D ---- – D ---- = DMAX VOUT VLOWSIDE + VINMIN VLOWSIDE VHIGHSIDE – + ------------------------------------------------------------------------------------------------ = DMIN VOUT VLOWSIDE + VINMAX VLOWSIDE VHIGHSIDE – + -------------------------------------------------------------------------------------------------- = VPP IOUT CIN fSW ------------------------- 1 D ---- – D ---- ESR IOUT IL + + = CIN IOUT VPP fSW -------------------------- 1 D ---- – D ---- = |
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