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LM7131ACMX 数据表(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 LM7131ACMX
功能描述  Tiny High Speed Single Supply Operational Amplifier
PDF  23 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

LM7131ACMX 数据表(HTML) 2 Page - National Semiconductor (TI)

  LM7131ACMX Datasheet HTML 1Page - National Semiconductor (TI) LM7131ACMX Datasheet HTML 2Page - National Semiconductor (TI) LM7131ACMX Datasheet HTML 3Page - National Semiconductor (TI) LM7131ACMX Datasheet HTML 4Page - National Semiconductor (TI) LM7131ACMX Datasheet HTML 5Page - National Semiconductor (TI) LM7131ACMX Datasheet HTML 6Page - National Semiconductor (TI) LM7131ACMX Datasheet HTML 7Page - National Semiconductor (TI) LM7131ACMX Datasheet HTML 8Page - National Semiconductor (TI) LM7131ACMX Datasheet HTML 9Page - National Semiconductor (TI) Next Button
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
2000V
Differential Input Voltage
±2.0
Voltage at Input/Output Pin
(V
+)+0.1V, (V−) − 0.3V
Supply Voltage (V
+ –V−)
12V
Current at Input Pin
±5mA
Current at Output Pin (Note 3)
±80 mA
Current at Power Supply Pin
±80 mA
Lead Temperature
(soldering, 10 sec)
260˚C
Storage Temperature Range
− 65˚C to +150˚C
Junction Temperature (Note 4)
150˚C
Operating Ratings
Supply Voltage (V
+ –V−)
2.7V
≤ V ≤ 12V
Junction Temperature Range
LM7131AC, LM7131BC
0˚C
≤ T
J ≤ + 70˚C
Thermal Resistance (
θ
JA)
SO-8 Package, 8-Pin Surface Mount
165˚C/W
M05A Package, 5-Pin Surface Mount
325˚C/W
3V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J = 25˚C, V
+ = 3V, V− = 0V, V
CM = VO = V
+/2 and R
L = 150Ω. Bold-
face limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Typ
(Note 5)
LM7131AC
LM7131BC
Units
Limit
Limit
(Note 6)
(Note 6)
V
OS
Input Offset Voltage
0.02
3.5
7
mV
410
max
TCV
OS
Input Offset Voltage
10
µV/˚C
Average Drift
I
B
Input Bias Current
20
35
35
µA
40
40
max
I
OS
Input Offset Current
0.35
3.5
3.5
µA
55
max
CMRR
Common Mode
0V
≤ V
CM ≤ 0.85V
75
60
60
dB
Rejection Ratio
(Video Levels)
55
55
min
CMRR
Common Mode
0.85V
≤ V
CM ≤ 1.7V
70
55
55
dB
Rejection Ratio
(Mid-Range)
50
50
min
+PSRR
Positive Power Supply
V
+ = 3V, V− = 0V
75
65
65
dB
Rejection Ratio
V
+ = 3V to 6.5V
60
60
min
−PSRR
Negative Power Supply
V
− = −3V, V+ = 0V
75
65
65
dB
Rejection Ratio
V
− = −3V to −6.5V
60
60
min
V
CM
Input Common-Mode
V
+ = 3V
0.0
0.0
0.0
V
Voltage Range
For CMRR
≥ 50 dB
0.00
0.00
min
2.0
1.70
1.70
V
1.60
1.60
max
A
VOL
Voltage Gain
R
L = 150Ω,VO = 0.250V
60
55
55
dB
to 1.250V
50
50
C
IN
Common-Mode
2
pF
Input Capacitance
V
O
Output Swing
V
+ = 3V, R
L = 150Ω
2.6
2.3
2.3
V
High
terminated at 0V
2.0
2.0
min
Low
V
+ = 3V, R
L = 150Ω
0.05
0.15
0.15
V
terminated at 0V
0.20
0.20
max
High
V
+ = 3V, R
L = 150Ω
2.6
2.3
2.3
V
terminated at 1.5V
2.0
2.0
min
Low
V
+ = 3V, R
L = 150Ω
0.5
0.8
0.8
V
terminated at 1.5V
1.0
1.0
max
V
O
Output Swing
V
+ = 3V, R
L = 600Ω
2.73
V
High
terminated at 0V
max
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