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MB91F577CSPMC 数据表(PDF) 153 Page - Cypress Semiconductor

部件名 MB91F577CSPMC
功能描述  32-bit RISC, load/store architecture, 5-stage pipeline
PDF  163 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
标志 CYPRESS - Cypress Semiconductor

MB91F577CSPMC 数据表(HTML) 153 Page - Cypress Semiconductor

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Document Number: 002-04725 Rev.*A
Page 153 of 163
MB91570 Series
Linearity error of digital output N =
VNT - {1LSB × (N - 1) + VOT}
[LSB]
1LSB
Differential linearity error of digital output N =
V(N + 1) T - VNT
- 1 LSB [LSB]
1LSB
1LSB =
VFST - VOT
[V]
1022
VOT: Voltage at which the digital output changes from “000H” to “001 H”.
VFST: Voltage at which the digital output changes from “3FE H” to “3FF H”.
13.5.3
Notes on Using A/D Converter
<About the output impedance of the analog input of external circuit>
• External impedance values of the external input of 4.2 kΩ or lower (sampling time = 1.2 μs@ machine clock of 16 MHz) are
recommended. When the external impedance is too high, the sampling time for analog voltages may not be sufficient. In this
case, it is recommended to connect the capacitor (approx. 0.1 μF) to the analog input pin.
Analog input circuit model
R
C
MB91570series
4.0k
Ω(Max)
16.5pF(Max) *
*: except DA shared pin
Note: Listed values must be considered as reference values.
R
Analog input
During sampling: ON
Comparator
C



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