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P9235A-RNDGI 数据表(PDF) 18 Page - Integrated Device Technology

部件名 P9235A-RNDGI
功能描述  Wireless Power Transmitter
PDF  23 Pages
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制造商  IDT [Integrated Device Technology]
网页  http://www.idt.com
标志 IDT - Integrated Device Technology

P9235A-RNDGI 数据表(HTML) 18 Page - Integrated Device Technology

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P9235A-R Datasheet
© 2016 Integrated Device Technology, Inc
18
May 17, 2016
Power Dissipation and Thermal Requirements
The P9235A-R is offered in a QFN-40 package which has a maximum power dissipation capability of approximately 1.2W. The number of
thermal vias between the package and the printed circuit board determines the maximum power dissipation. The maximum power dissipation
of the package is limited by the die’s specified maximum operating junction temperature, TJ(MAX), of 125°C, the maximum ambient operating
temperature, TA, of 85°C,and the package thermal resistance, ΘJA. The junction temperature rises when the heat generated by the device’s
power dissipation flows through the package thermal resistance. The QFN package offers a typical thermal resistance, junction to ambient
JA), of 28.5°C/W when the PCB layout guideline and surrounding devices are optimized.
The techniques as noted in the PCB layout section must be followed when designing the printed circuit board layout. Attention to the
placement of the P9235A-R IC and bridge FET packages, in proximity to other heat-generating devices in a given application design, should
also be considered. The ambient temperature around the power IC will also have an effect on the thermal limits of an application. The main
factors influencing ΘJA (in the order of decreasing influence) are PCB characteristics, die/package attach thermal pad size (QFN) and thermal
vias, and final system hardware construction. Board designers should keep in mind that the package thermal metric ΘJA is impacted by the
characteristics of the PCB itself upon which the IC is mounted. Changing the design or configuration of the PCB changes the overall thermal
resistivity and the board’s heat-sinking efficiency.
The use of integrated circuits in low-profile and fine-pitch surface-mount packages requires special attention to power dissipation. Many
system-dependent issues such as thermal coupling, airflow, added heat sinks, convection surfaces, and the presence of other heat-
generating components affect the power-dissipation limits of a given component.
In summary, the three basic approaches for enhancing thermal performance are:
1. Improve the power dissipation capability of the PCB design
2. Improve the thermal coupling of the component to the PCB
3. Introduce airflow into the system
First, the maximum power dissipation for a given situation should be calculated:
PD(MAX) = (TJ(MAX) - TA)/θJA
In which
PD(MAX) = Maximum Power Dissipation
θJA = Package Thermal Resistance (°C/W)
TJ(MAX) = Maximum Device Junction Temperature (°C)
TA = Ambient Temperature (°C)
The maximum recommended operating junction temperature (TJ(MAX)) for the P9235A-R device is 120°C. The thermal resistance of the 40-pin
QFN package is optimally θJA=28.5°C/W. Operation is specified to a maximum steady-state ambient temperature (TA) of 85°C. Therefore, the
maximum recommended power dissipation is:
PD(Max) = (120°C - 85°C) / 28.5°C/W ≅ 1.2 Watt.
Thermal Protection
To allow the maximum load current, and to prevent thermal overload, he heat generated by the P9235A-R solution must be dissipated into the
PCB. All the available pins must be soldered to the PCB. GND pins (exposed paddle, EP) and bridge FET GND pins should be soldered to
the PCB ground plane to improve thermal performance, with multiple vias connected to all layers of the PCB.
Special Notes
NDG QFN-40 Package Assembly
Note 1: Unopened Dry Packaged Parts have a one-year shelf life.
Note 2: The HIC indicator card for newly-opened Dry Packaged Parts should be checked. If there is any moisture content, the parts must be
baked for a minimum of 8 hours at 125˚C within 24 hours prior to the assembly reflow process.



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