WM9711 datasheet(39/66 Pages) WOLFSON

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Production Data

WM9711L

PD Rev 4.1 April 2004

COMP1

COMP2

REF

GPIO2/

IRQ

GPIO

PINS

DEAD

BAT

LOW

BAT

GPIO /

INTERRUPT

LOGIC

BATT

WM9711L

ALARM

VOLTAGE

REGULATOR

AVDD, DCVDD, ...

Figure 6 Battery Alarm Example Schematic

The typical schematic for a dual threshold battery alarm is shown above. This alarm has two

thresholds, “dead battery” (COMP1) and “low battery” (COMP2). R1, R2 and R3 set the threshold

voltages. Their values can be up to about 1M

Ω in order to keep the battery current [IALARM = VBATT /

(R1+R2+R3)] to a minimum (higher resistor values may affect the accuracy of the system as leakage

currents into the input pins become significant).

•

Dead battery alarm: COMP1 triggers when VBATT < VREF

× (R1+R2+R3) / (R2+R3)

A dead battery alarm is the highest priority of interrupt in the system. It should immediately save all

unsaved data and shut down the system. The GP15, GS15 and GW15 bits must be set to generate

this interrupt.

•

Low battery alarm: COMP2 triggers when VBATT < VREF

× (R1+R2+R3) / R3

A low battery alarm has a lower priority than a dead battery alarm. Since the threshold voltage is

higher than for a dead battery alarm, there is enough power left in the battery to give the user a

warning and/or shut down “gracefully”. When VBATT gets close to the low battery threshold, spurious

alarms are filtered out by the COMP2 delay function.

The purpose of the capacitor C is to remove from the comparator inputs any high frequency noise or

glitches that may be present on the battery (for example, noise generated by a charge pump). It

forms a low pass filter with R1, R2 and R3.

•

Low pass cutoff fc [Hz] = 1/ (2

π C × (R1 || (R2+R3)))

Provided that the cutoff frequency is several orders of magnitude lower than the noise frequency fn,

this simple circuit can achieve excellent noise rejection.

•

Noise rejection [dB] = 20 log (fn / fc)

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