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LM8272 数据表(PDF) 12 Page - National Semiconductor (TI) |
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LM8272 数据表(HTML) 12 Page - National Semiconductor (TI) |
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12 / 14 page ![]() Application Notes (Continued) Noise Gain (<2) and with less than 150mV voltage to the supply rail, if the output loading is light, the Phase Margin reduction could result in unwanted oscillations. In the case of the LM8272, due to inherent architectural specifics, the oscillation occurs only with respect to Q10 when output swings to within 150mV of V −. However, if Q10 collector current is larger than its idle value of a few micro- amps, the Phase Margin loss becomes insignificant. In this case, 300µA is the required Q10 collector current to remedy this situation. Therefore, when all the aforementioned critical conditions are present at the same time (NG < 2, V OUT < 150mV from supply rails, & output load is light) it is possible to ensure stability by adding a load resistor to the output to provide the necessary Q10 minimum Collector Current (300µA). For 12V (or ±6V) operation, for example, add a 39k Ω resis- tor from the output to V + to cause 300µA output sinking current and ensure stability. This is equivalent to about 15% increase in total quiescent power dissipation. DRIVING CAPACTIVE LOADS: The LM8272 is specifically designed to drive unlimited ca- pacitive loads without oscillations (see Settling Time and Overshoot vs. Cap Load plots in the typical performance characteristics section). In addition, the output current han- dling capability of the device allows for good slewing char- acteristics even with large capacitive loads (Settling Time and Slew Rate vs. Cap Load plot). The combination of these features is ideal for applications such as TFT flat panel buffers, A/D converter input amplifiers, etc. However, as in most Op Amps, addition of a series isolation resistor between the Op Amp and the capacitive load im- proves the settling and overshoot performance. Output current drive is an important parameter when driving capacitive loads. This parameter will determine how fast the output voltage can change. Referring to the Settling Time and Slew Rate vs. Cap Load plots (typical performance characteristics section), two distinct regions can be identi- fied. Below about 10,000pF, the output Slew Rate is solely determined by the Op Amp’s compensation capacitor value and available current into that capacitor. Beyond 10nF, the Slew Rate is determined by the Op Amp’s available output current. An estimate of positive and negative slew rates for loads larger than 100nF can be made by dividing the short circuit current value by the capacitor. ESTIMATING THE OUTPUT VOLTAGE SWING It is important to keep in mind that the steady state output current will be less than the current available when there is an input overdrive present. For steady state conditions, Fig- ure 3 and Figure 4 plots can be used to predict the output swing. These plots also show several load lines correspond- ing to loads tied between the output and ground. In each case, the intersection of the device plot at the appropriate temperature with the load line would be the typical output swing possible for that load. For example, a 600 Ω load can accommodate an output swing to within 100mV of V − and to 250mV of V + (V S = ±5V) corresponding to a typical 9.65VPP unclipped swing. 10130890 FIGURE 3. Steady State Output Sourcing Characteristics with Load Lines 10130891 FIGURE 4. Steady State Output Sinking Characteristics with Load Lines www.national.com 12 |
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