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CS7410 数据表(PDF) 7 Page - Cirrus Logic |
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CS7410 数据表(HTML) 7 Page - Cirrus Logic |
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7 / 39 page ![]() CS7410 DS553PP1 7 1.1.4 DC CHARACTERISTICS (TA= 25°C; VDD_PLL=VDD_CORE=1.8V±10%, VDD_IO=3.3V±10%) 1.1.4.1 SDRAM Interface Symbol Description Min Typ Max Unit tmper DR_CKO Period 22 ns tmco Output Delay from DR_CKO active edge 19 ns tmdow M_D[15:0] delay from DR_CKO 19 ns tmhw M_D[15:0] valid time after DR_CKO 5 ns tmsur M_D[15:0] setup to DR_CKO 13 ns tmhr M_D[15:0] hold time after DR_CKO 0 ns Table 1. SDRAM Characterization Data DR_CKO DR_RAS_L DR_CAS_L M_A M_D (write) M_WE_L t mper t mdow M_D (read) t msur t mhr t mhw t mco Figure 1. SDRAM Timing |
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