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EB03 数据表(PDF) 4 Page - List of Unclassifed Manufacturers

部件名 EB03
功能描述  TRIPLE INDEPENDENT LOGIC INTERFACED HALF BRIDGES
PDF  4 Pages
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制造商  ETC [List of Unclassifed Manufacturers]
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标志 ETC - List of Unclassifed Manufacturers

EB03 数据表(HTML) 4 Page - List of Unclassifed Manufacturers

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APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
4
EB03
OPERATING
CONSIDERATIONS
POWER SUPPLY REQUIREMENTS
SUPPLY
VOLTAGE
MAX CURRENT
HV1
50V to 200V
5A, continuous, 10A peak
HV2
50V to 200V
5A, continuous, 10A peak
HV3
50V to 200V
5A, continuous, 10A peak
Vcc1
10V to 20V
10mA
Vcc2
10V to 20V
10mA
Vcc3
10V to 20V
10mA
Vdd
4.5 to 20V
10mA
HV1, HV2, and HV3 may be used independently, or may
be one supply. Also Vcc1, Vcc2, and Vcc3 may be used
independently or tied together. The Vdd supply must be
compatible with the input logic. If a high voltage logic such as
CMOS is used it may be tied with the Vcc supplies. HCMOS
requires a 5V±10% supply
SPECIAL CONSIDERATIONS
GENERAL
The EB03 is designed to give the user maximum flexibility
in a digital or DSP based motion control system. Thermal,
overvoltage, overcurrent, and crossfire protection circuits are
part of the user’s design.
Users should read Application Note 1, "General Operating
Considerations;” and Application Note 30, “PWM Basics”
for much useful information in applying this part. These
Application Notes are in the “Power Integrated Circuits Data
Book” and on line at www.apexmicrotech.com.
GROUNDING AND BYPASSING
As in any high power PWM system, grounding and
bypassing are one of the keys to success. The EB03 is
capable of generating 2 kW pulses with 40 n-second rise and
fall times. If improperly grounded or bypassed this can cause
horrible conducted and radiated EMI.
In order to reduce conducted EMI, the EB03 provides a
separate power ground, named HVRTN, for each high voltage
supply. These grounds are electrically isolated from the logic
ground and each other. This isolation eliminates high current
ground loops. However, more than 5V offset between the
grounds will destroy the EB03. Apex recommends back
to back high current diodes between logic and power
grounds; this will maintain isolation but keep offset at a
safe level. All grounds should tie together at one common
point in the system.
In order to reduce radiated EMI, Apex recommends a 50 µF
or larger capacitor between HV and HVRTN. This capacitor
should be a switching power grade electrolytic capacitor
with ESR rated at 20 kHz. This capacitor should be placed
physically as close to the EB03 as possible.
However, such a capacitor will typically have a few
hundred milli-ohms or so ESR. Therefore, each section
must also be bypassed with a low ESR 1µF or larger
ceramic capacitor.
In order to minimize radiated noise it is necessary to
minimize the area of the loop containing high frequency
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specificiations are subject to change without notice.
EBO3U REV. B JANUARY 2001 © 2001 Apex Microtechnology Corporation
current. (The size of the antenna.) Therefore the 1µF ceramic
capacitors should bypass each HV to its return right at
the pins the EB03.
SHOOT THROUGH PROTECTION
Power FETs have a relatively short turn on delay, and a
longer turn off delay. Therefore, if the turn on input to an FET
in a half bridge circuit is applied simultaneously with the turn
off input to the other FET in that half bridge, there will be a time
when both FETs are simultaneoulsy on. This "shoot through
condition" will short the power rails through the FETS, causing
excessive power dissipation and a very high EMI.
To avoid the shoot through condition the turn on of one FET
must be delayed long enough for the other FET in the same
half bridge to have completely turned off.
A delay of at least .5 µ-seconds is required for the EB03.This
delay is required for both the Hin and Lin inputs.
PROTECTION CIRCUITS
The EB03 does not include protection circuits.
However, there is a shut down input which will turn off all
FETs when at logic “1”. This input may be used with user
designed temperature sensing and current sensing circuits
to shut down the FETs in the event of a detected unsafe
condition. This is recommended since the FETs may be
turned off this way even if the normal input logic or DSP
programming is faulty.
START UP CONSIDERATIONS
The lower rail FET in the half bridge must be turned on
for at least 2 µ-seconds to charge the bootstrap capacitor
before the top rail FET can be turned on. This must be done
no more than 330 µ-seconds prior to turning on the top rail
FET. However, a grounded load will also charge the bootstrap
capacitor. Therefore this consideration may be ignored when
driving a grounded load.
An internal floating supply is used to enhance the operation
of the bootstrap bias circuit. This allows the top rail FETs to
be held on indefinitely once turned on.
HEATSINK
The EB03 should be provided with sufficient heatsink to
dissipate 40 watts when operating at 200V, 5A, 50kHz, 1000pf
load capacitance per section, and 3 sections simultaneously
providing maximum current.
The dissipation is composed of conduction losses (IoutxVsat)
up to 9.45 watts per half bridge and switching losses of
about 3.72 watts per half bridge. The conduction losses
are proportional to HV supply voltage, total capacitance,
and switching frequency.



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