MP7541B

2

Rev. 2.00

ORDERING INFORMATION

Package

Type

Temperature

Range

Part No.

Ceramic Dip

MP7541BSD*

Ceramic Dip

MP7541BTD*

Plastic Dip

MP7541BJN

Plastic Dip

MP7541BKN

SOIC

MP7541BJS

SOIC

MP7541BKS

–55 to +125

–40 to +85

–55 to +125

–40 to +85

–40 to +85

–40 to +85

1

1

1

1/2

1/2

1/2

8

5

1

1

1

1/2

1/2

1/2

INL

(LSB)

Gain Error

(LSB)

DNL

(LSB)

8

5

5

8

*Contact factory for non-compliant military processing

PIN CONFIGURATIONS

GND

(MSB) BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 12 (LSB)

BIT 11

BIT 10

BIT 9

BIT 8

BIT 7

18 Pin PDIP, CDIP (0.300”)

N18, D18

1

2

3

4

5

6

7

8

9

18

17

16

15

14

13

12

11

10

18

1

10

9

2

3

4

5

6

7

15

14

13

12

11

17

16

8

18 Pin SOIC (Jedec, 0.300”)

S18

BIT 12 (LSB)

BIT 11

BIT 10

BIT 9

BIT 8

BIT 7

GND

(MSB) BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

See Packaging Section for Package Dimensions

PIN OUT DEFINITIONS

PIN NO.

NAME

DESCRIPTION

Current Output 1

Current Output 2

3

GND

Ground

4

BIT 1

Data Input Bit 1 (MSB)

5

BIT 2

Data Input Bit 2

6

BIT 3

Data Input Bit 3

7

BIT 4

Data Input Bit 4

8

BIT 5

Data Input Bit 5

9

BIT 6

Data Input Bit 6

PIN NO.

NAME

DESCRIPTION

10

BIT 7

Data Input Bit 7

11

BIT 8

Data Input Bit 8

12

BIT 9

Data Input Bit 9

13

BIT 10

Data Input Bit 10

14

BIT 11

Data Input Bit 11

15

BIT 12

Data Input Bit 12 (LSB)

16

Positive Power Supply

17

Reference Input Voltage

18

Internal Feedback Resistor