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LP3927 数据表(PDF) 12 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 LP3927
功能描述  Cellular/PCS System Power Management IC
PDF  16 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

LP3927 数据表(HTML) 12 Page - National Semiconductor (TI)

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VEXT Detect Start-Up/Shut Down
20037927
Note: Diagram indicates Open Drain IRQ tied to VDD.
*** = Internal signal
1.
VEXT goes active low.
2.
VEXT 32 msec de-bounce period.
3.
Delay between LDO1 and LDO2 enables.
4.
Both LDO1 and LDO2 outputs reach 95% of respective output voltage, start Reset timer.
5.
Reset delay.
6.
Period between Reset and PS_HOLD going high is not relevant since VEXT is low
7.
PS_HOLD goes low but LDOs continue to run since VEXT is low.
8.
PS_HOLD is low and VEXT goes high, RST pin goes low.
9.
Delay between RST going low and LDO2 disabled.
10. Delay between LDO2 and LDO1 disabled.
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