STR71XF datasheet(21/49 Pages) STMICROELECTRONICS

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STR71xF - INTRODUCTION

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Legend / Abbreviations for Table 3:

Type:

I = input, O = output, S = supply, HiZ= high impedance,

In/Output level: C = CMOS 0.3VDD/0.7VDD

CT= CMOS 0.8V / 2V with input trigger

TT= TTL 0.3VDD/0.7VDD with input trigger

C/T = Programmable levels: CMOS 0.3VDD/0.7VDD or TTL 0.8V / 2V

Port and control configuration:

– Input:

pu/pd= software enabled internal pull-up or pull down

pu= in reset state, the internal 100k

Ω weak pull-up is enabled.

pd = in reset state, the internal 100k

Ω weak pull-down is enabled.

– Output:

OD = open drain (logic level)

PP = push-pull

T = true OD, (P-Buffer and protection diode to VDD not implemented), 5V tolerant.

Table 6. STR711/STR712/STR715 Pin Description

Pin n°

Pin Name

Input

Output

Main

function

(after

reset)

Alternate function

1A1

P0.10/U1.RX/

U1.TX/

SC.DATA

I/O pd CT X4mA T

Port

0.10

UART1: Receive

Data input

UART1: Transmit data

output.

Note: This pin may be used for Smartcard

DataIn/DataOut or single wire UART (half du-

plex) if programmed as Alternate Function

Output. The pin will be tri-stated except when

UART transmission is in progress

2B1

P0.11/

BOOT.1/

U1.TX

I/O pd CT

4mA X

Port

0.11

Select Boot Con-

figuration input

UART1: Transmit data

output.

P0.12/SC.CLK

I/O pd CT

4mA

Port

0.12

Smartcard reference clock output

4B2

VSS

Ground voltage for digital I/Os

5C2

P0.13/U2.RX/

T2.OCMPA

I/O pu CT X4mA X

Port

0.13

UART2: Receive

Data input

Timer2: Output Compare

A output

6D1

P0.14/U2.TX/

T2.ICAPA

I/O pu CT

4mA X

Port

0.14

UART2: Transmit

data output

Timer2: Input Capture A

input

BOOTEN

Boot control input. Enables sampling of BOOT[1:0] pins

8D2

VSS

Ground voltage for digital I/Os

9E1

V33

Supply voltage for digital I/Os

JTDI

JTAG Data input. External pull-up required.

JTMS

JTAG Mode Selection Input. External pull-up required.

JTCK

JTAG Clock Input. External pull-up or pull-down re-

quired.

JTDO

8mA

JTAG Data output. Note: Reset state = HiZ.

JTRST

ITT

JTAG Reset Input. External pull-up required.

Reserved, must be forced to ground.

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