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MM5451 数据表(PDF) 2 Page - National Semiconductor (TI) |
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MM5451 数据表(HTML) 2 Page - National Semiconductor (TI) |
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2 / 8 page ![]() Absolute Maximum Ratings If MilitaryAerospace specified devices are required please contact the National Semiconductor Sales OfficeDistributors for availability and specifications Voltage at Any Pin VSS b 03V to VSS a 12V Operating Temperature b25 Cto a85 C Storage Temperature b65 Cto a150 C Junction Temperature a150 C Lead Temperature (Soldering 10 sec) 300 C Power Dissipation at a25 C Molded DIP Package Board Mount 25W Molded DIP Package Socket Mount 23W Molded DIP Package board mount iJA e 49 CW Derate 204 mW C above 25 C Molded DIP Package socket mount iJA e 54 CW Derate 185 mW C above 25 C Electrical Characteristics TAwithinoperatingrange VDD e 475Vto110V VSS e 0Vunlessotherwisespecified Parameter Conditions Min Typ Max Units Power Supply 475 11 V Power Supply Current Excluding Output Loads 7 mA Input Voltages Logical ‘‘0’’ Level (VL) g10 mA Input Bias b03 08 V Logical ‘‘1’’ Level (VH) 475V s VDD s 525V 22 VDD V VDD l 525V VDD b 2V VDD V Brightness Input (Note 2) 0 075 mA Output Sink Current Segment OFF VOUT e 30V 10 mA Segment ON VOUT e 1V (Note 3) Brightness Input e 0 mA0 10 mA Brightness Input e 100 mA 20 27 4 mA Brightness Input e 750 mA15 25 mA Brightness Input Voltage (Pin 19) Input Current 750 mA 30 43 V Output Matching (Note 1) g20 % Clock Input (Notes 5 and 6) Frequency fC 500 kHz High Time th 950 ns Low Time tl 950 ns Data Input Set-Up Time tDS 300 ns Hold Time tDH 300 ns Data Enable Input Set-Up Time tDES 100 ns Note 1 Output matching is calculated as the percent variation (IMAX a IMIN)2 Note 2 With a fixed resistor on the brightness input pin some variation in brightness will occur from one device to another Maximum brightness input current can be 2 mA as long as Note 3 and junction temperature equation are complied with Note 3 See Figures 5 6 and 7 for Recommended Operating Conditions and limits Absolute maximum for each output should be limited to 40 mA Note 4 The VOUT voltage should be regulated by the user See Figures 6 and 7 for allowable VOUT vs IOUT operation Note 5 AC input waveform specification for test purpose tr s 20 ns tf s 20 ns f e 500 kHz 50% g10% duty cycle Note 6 Clock input rise and fall times must not exceed 300 ns Connection Diagrams Dual-In-Line Package TLF6136 – 2 Top View FIGURE 2a Dual-In-Line Package TLF6136 – 3 Top View FIGURE 2b Order Number MM5450N MM5451N MM5450V or MM5451V See NS Package Number N40A or V44A 2 |
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