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STBCFG01 数据表(PDF) 22 Page - STMicroelectronics

部件名 STBCFG01
功能描述  Integrated current sensing resistor
PDF  37 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STBCFG01 数据表(HTML) 22 Page - STMicroelectronics

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Operation description
STBCFG01
22/37
DocID026474 Rev 3
5.7
Shutdown mode
When SHDN pin is tied high the device enters shutdown mode. In this mode, the switching
converter turns off and it cannot be used neither in charging mode nor OTG boost mode.
LDO and fuel gauge functionality are not affected by SHDN pin.
5.8
Watchdog
A watchdog timer function can be enabled to reset the programmable register values to
power-on reset values if no I²C acknowledgments are generated for more than 45 seconds.
This function is normally disabled.
5.9
Alarms
The STBCFG01 provides an open drain active low interrupt output (IRQn) to notify the
application processor about abnormal operating conditions or generic events. The following
register types check the status of alarms and control the device:
Interrupt enable
Interrupt latch
The interrupt enable registers enable the propagation of alarms to the interrupt pin (IRQn).
The interrupt is generated (IRQn pulled low) on a rising edge of the interrupt latch bits
(assuming that the corresponding enable bit has been set).
The interrupt latch registers show the alarm conditions, which generate the interrupt.
Although the alarm condition is no longer active, once each latch register bit is set, it stays
high until the register is updated. Interrupt latch registers are updated by writing 0 to their
bits: if the alarm condition is still active the bit is kept to 1 (new interrupt is not generated); if
the alarm condition is no more active the bit is cleared. This update method assures that no
further rising edge on the latch bit is generated for alarms which have already been
signaled before the update operation. In order to release IRQn line after an interrupt
generated by the charger/OTG, the host processor has to write 0 to IRQ_CLR bit in
CHG_Cfg2 register and then back 1. The fuel gauge generated alarms share the same
enable bit (ALRM_en).
The following conditions generate an interrupt signal:
DCIN UVLO
DCIN OVP
ASD condition
Pre-charge timer expiration
Fast charge timer expiration
Watchdog timer expiration
Battery overvoltage protection (charger)
End of charge
Battery undervoltage lockout (OTG boost)
VBUS overvoltage protection (OTG boost)
Average current limit reached (OTG boost, IBATLIM)
OTG output short-circuit; thermal shutdown
Low battery voltage (fuel gauge)
Low SOC (fuel gauge)



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