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NS486SXF 数据表(PDF) 2 Page - National Semiconductor (TI) |
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NS486SXF 数据表(HTML) 2 Page - National Semiconductor (TI) |
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2 / 44 page ![]() Table of Contents 10 SYSTEM OVERVIEW 11 NS486SXF System Overview 12 32-bit Processor Core 13 System Service Elements 131 DRAM Controller 132 DMA Controller 133 Programmable Interval Timer 134 WATCHDOG Timer 135 Interrupt Controller 136 Real Time ClockCalendar 137 Power Management Features 14 NS486SXF System Bus 15 Other On-board Peripherals 151 Reconfigurable IO Lines 152 IEEE 1284 Bidirectional Port 153 PCMCIA Interface 154 MICROWIREAccessbus Interface 155 UART Serial Port 156 LCD Controller 16 ICE Support 17 Other Issues 20 PIN DESCRIPTION TABLES 30 DEVICE SPECIFICATIONS 31 DC Electrical Specifications 5V g 5% 311 Recommended Operating Conditions 312 Absolute Maximum Ratings (Notes 2 and 3) 313 Capacitance TA e 25 C f e 1 MHz 314 DC Characteristics 32 General AC Specifications 321 Power Ramp Times 322 PWRGOOD and Power Rampdown Timing 33 AC Switching Specifications 331 DRAM Interface Timing Specification 332 ISA-like Bus Cycles Timing Specification 333 Ready Feedback Timing Specifications 334 OSCX1 AC Specification 335 Peripheral Timing Specifications 34 Physical Description http www nationalcom 2 |
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