STM32L476RG datasheet(72/232 Pages) STMICROELECTRONICS

72 / 232 page

Pinouts and pin description

STM32L476xx

72/232

DocID025976 Rev 4

59 A7 A7

137

PB7

I/O

FT_fla

LPTIM1_IN2, TIM4_CH2,

TIM8_BKIN, I2C1_SDA,

DFSDM_CKIN5,

USART1_RX,

UART4_CTS,

TSC_G2_IO4,

LCD_SEG21, FMC_NL,

TIM8_BKIN_COMP1,

TIM17_CH1N, EVENTOUT

COMP2_

INM,

PVD_IN

60 D7 D7

138

BOOT0

61 E7 E7

139

PB8

I/O

FT_fl

TIM4_CH3, I2C1_SCL,

DFSDM_DATIN6,

CAN1_RX, LCD_SEG16,

SDMMC1_D4,

SAI1_MCLK_A,

TIM16_CH1, EVENTOUT

62 E8 E8

140

PB9

I/O

FT_fl

IR_OUT, TIM4_CH4,

I2C1_SDA, SPI2_NSS,

DFSDM_CKIN6,

CAN1_TX, LCD_COM3,

SDMMC1_D5,

SAI1_FS_A, TIM17_CH1,

EVENTOUT

141

PE0

I/O

FT_l

TIM4_ETR, LCD_SEG36,

FMC_NBL0, TIM16_CH1,

EVENTOUT

142

PE1

I/O

FT_l

LCD_SEG37, FMC_NBL1,

TIM17_CH1, EVENTOUT

63 A8 A8

143

VSS

64 A9 A9 100 C4

144

VDD

1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current

(3 mA), the use of GPIOs PC13 to PC15 in output mode is limited:

- The speed should not exceed 2 MHz with a maximum load of 30 pF

- These GPIOs must not be used as current sources (e.g. to drive an LED).

2. After a Backup domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the content of

the RTC registers which are not reset by the system reset. For details on how to manage these GPIOs, refer to the Backup

domain and RTC register descriptions in the RM0351 reference manual.

3. After reset, these pins are configured as JTAG/SW debug alternate functions, and the internal pull-up on PA15, PA13, PB4

pins and the internal pull-down on PA14 pin are activated.

Table 15. STM32L476xxSTM32L476xx pin definitions (continued)

Pin Number

Pin name

(function after

reset)

Pin functions

Alternate functions

Additional

functions

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