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STM32L476RG 数据表(PDF) 183 Page - STMicroelectronics |
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STM32L476RG 数据表(HTML) 183 Page - STMicroelectronics |
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183 / 232 page ![]() DocID025976 Rev 4 183/232 STM32L476xx Electrical characteristics 207 Quad SPI characteristics Unless otherwise specified, the parameters given in Table 84 and Table 85 for Quad SPI are derived from tests performed under the ambient temperature, fAHB frequency and VDD supply voltage conditions summarized in Table 22: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load C = 15 or 20 pF • Measurement points are done at CMOS levels: 0.5 ₓ VDD Refer to Section 6.3.14: I/O port characteristics for more details on the input/output alternate function characteristics. Table 84. Quad SPI characteristics in SDR mode(1) Symbol Parameter Conditions Min Typ Max Unit FCK 1/t(CK) Quad SPI clock frequency 1.71 < VDD< 3.6 V, CLOAD = 20 pF Voltage Range 1 -- 40 MHz 1.71 < VDD< 3.6 V, CLOAD = 15 pF Voltage Range 1 -- 48 2.7 < VDD< 3.6 V, CLOAD = 15 pF Voltage Range 1 -- 60 1.71 < VDD < 3.6 V CLOAD = 20 pF Voltage Range 2 -- 26 tw(CKH) Quad SPI clock high and low time fAHBCLK= 48 MHz, presc=0 t(CK)/2-2 - t(CK)/2 ns tw(CKL) t(CK)/2 - t(CK)/2+2 ts(IN) Data input setup time Voltage Range 1 4 - - Voltage Range 2 3.5 - - th(IN) Data input hold time Voltage Range 1 5.5 - - Voltage Range 2 6.5 - - tv(OUT) Data output valid time Voltage Range 1 - 2.5 5 Voltage Range 2 - 3 5 th(OUT) Data output hold time Voltage Range 1 1.5 - - Voltage Range 2 2 - - 1. Guaranteed by characterization results. |
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