NSC800D datasheet(39/76 Pages) NSC

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126 8-Bit Arithmetic (Continued)

76543210

11001110

Timing

M cycles2

T states7 (4 3)

Addressing Mode

SourceImmediate

DestinationImplied

SUB

Subtract the immediate data n from the Accumulator

w A b n

S Set if result is negative

Z Set if result is zero

H Set if borrow from bit 4

PV Set if result exceeds 8-bit 2’s

complement range

N Set

C Set according to borrow

condition

76543210

11010110

Timing

M cycles2

T states7 (4 3)

Addressing Mode

SourceImmediate

DestinationImplied

SBC

A n

Subtract with carry the immediate data n from the Accumu-

lator

w A b n b CY

S Set if result is negative

Z Set if result is zero

H Set if borrow from bit 4

PV Set if result exceeds 8-bit 2’s

complement range

N Set

C Set according to borrow

condition

76543210

11011110

Timing

M cycles2

T states7 (4 3)

Addressing Mode

SourceImmediate

DestinationImplied

AND

The immediate data n is logically AND’ed to the Accumula-

tor

w A

S Set if result is negative

Z Set if result is zero

H Set

PV Set if result parity is even

N Reset

C Reset

76543210

11100110

Timing

M cycles2

T states7 (4 3)

Addressing Mode

SourceImmediate

DestinationImplied

The immediate data n is logically OR’ed to the contents of

the Accumulator

w A

S Set if result is negative

Z Set if result is zero

H Reset

PV Set if result parity is even

N Reset

C Reset

76543210

11110110

Timing

M cycles2

T states7 (4 3)

Addressing Mode

SourceImmediate

DestinationImplied

XOR

The immediate data n is exclusively OR’ed with the Accu-

mulator

w A Z n

S Set if result is negative

Z Set if result is zero

H Reset

PV Set if result parity is even

N Reset

C Reset

NSC800D 数据表(PDF) 39 Page - National Semiconductor (TI)

NSC800D 数据表(HTML) 39 Page - National Semiconductor (TI)

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NSC800D 数据表(PDF) 39 Page - National Semiconductor (TI)

NSC800D 数据表(HTML) 39 Page - National Semiconductor (TI)

Html Pages

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