OMAP3530ECUS datasheet(3/265 Pages) TI1

3 / 265 page

OMAP3530, OMAP3525

www.ti.com

SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013

• 65-nm CMOS Technologies

.65-mm Ball Pitch (Top), .5-mm Ball Pitch

(Bottom)

• Package-On-Package (POP) Implementation for

Memory Stacking (Not Available in CUS

– 423-pin s-PBGA Package (CUS Suffix),

Package)

.65-mm Ball Pitch

• Discrete Memory Interface (Not Available in

• 1.8-V I/O and 3.0-V (MMC1 Only),

CBC Package)

0.985-V to 1.35-V Adaptive Processor Core

Voltage

• Packages:

0.985-V to 1.35-V Adaptive Core Logic Voltage

– 515-pin s-PBGA Package (CBB Suffix),

Note: These are default Operating Performance

.5-mm Ball Pitch (Top), .4-mm Ball Pitch

Point (OPP) voltages and could be optimized to

(Bottom)

lower values using SmartReflex AVS.

– 515-pin s-PBGA Package (CBC Suffix),

1.2

Applications

•

Portable Navigation Devices

•

Portable Media Player

•

Digital Video Camera

•

Portable Data Collection

•

Point-of-Sale Devices

•

Gaming

•

Web Tablet

•

Smart White Goods

•

Smart Home Controllers

OMAP3530 and OMAP3525 Applications Processors

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Product Folder Links: OMAP3530 OMAP3525

OMAP3530ECUS 数据表(PDF) 3 Page - Texas Instruments

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