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OMAP3530ECUS 数据表(PDF) 61 Page - Texas Instruments

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部件名 OMAP3530ECUS
功能描述  Applications Processors
PDF  265 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

OMAP3530ECUS 数据表(HTML) 61 Page - Texas Instruments

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OMAP3530, OMAP3525
www.ti.com
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
Table 2-2. Ball Characteristics (CBC Pkg.)(1) (continued)
BALL
BALL
BUFFER
PULLUP
BALL
BALL TOP
PIN NAME
RESET REL.
MODE [4]
TYPE [5]
RESET
RESET REL.
POWER [9]
HYS [10]
STRENG TH
/DOWN
IO CELL [13]
BOTTOM [1]
[2]
[3]
MODE [8]
STATE [6]
STATE [7]
(mA) [11]
TYPE [12]
C23
NA
cam_hs
0
IO
L
L
7
vdds
Yes
4
(15)
PU100/
LVCMOS
PD100
gpio_94
4
IO
hw_dbg0
5
O
safe_mode
7
-
C26
NA
cam_pclk
0
I
L
L
7
vdds
Yes
4
(15)
PU100/
LVCMOS
PD100
gpio_97
4
IO
hw_dbg2
5
O
safe_mode
7
-
D26
NA
cam_strobe
0
O
L
L
7
vdds
Yes
4
(15)
PU100/
LVCMOS
PD100
gpio_126
4
IO
hw_dbg11
5
O
safe_mode
7
-
C25
NA
cam_xclka
0
O
L
L
7
vdds
Yes
4
(15)
PU100/
LVCMOS
PD100
gpio_96
4
IO
safe_mode
7
-
E25
NA
cam_xclkb
0
O
L
L
7
vdds
Yes
4
(16)
PU100/
LVCMOS
PD100
gpio_111
4
IO
safe_mode
7
-
P25
NA
cam_d6
0
I
L
L
7
vdds
NA
4
PU100/
SubLVDS
PD100
gpio_105
4
IO
safe_mode
7
-
P26
NA
cam_d7
0
I
L
L
7
vdds
NA
4
PU100/
SubLVDS
PD100
gpio_106
4
IO
safe_mode
7
-
N25
NA
cam_d8
0
I
L
L
7
vdds
NA
4
PU100/
SubLVDS
PD100
gpio_107
4
IO
safe_mode
7
-
N26
NA
cam_d9
0
I
L
L
7
vdds
NA
4
PU100/
SubLVDS
PD100
gpio_108
4
IO
safe_mode
7
-
D23
NA
cam_vs
0
IO
L
L
7
vdds
Yes
4
(16)
PU100/
LVCMOS
PD100
gpio_95
4
IO
hw_dbg1
5
O
safe_mode
7
-
A23
NA
cam_wen
0
I
L
L
7
vdds
Yes
4
(16)
PU100/
LVCMOS
PD100
cam_shutter
2
O
gpio_167
4
IO
hw_dbg10
5
O
safe_mode
7
-
F26
NA
dss_acbias
0
O
L
L
7
vdds
Yes
8
PU100/
LVCMOS
PD100
gpio_69
4
IO
safe_mode
7
-
G26
NA
dss_data6
0
IO
L
L
7
vdds
Yes
8
PU100/
LVCMOS
PD100
uart1_tx
2
O
gpio_76
4
IO
hw_dbg14
5
O
(16) The capacity load range is [2 pf to 6 pF].
Copyright © 2008–2013, Texas Instruments Incorporated
TERMINAL DESCRIPTION
61
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Product Folder Links: OMAP3530 OMAP3525



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