PC87306 datasheet(13/110 Pages) NSC

13 / 110 page

10 Pin Description (Continued)

TABLE 1-1 Pin Descriptions (Alphabetical)

(Continued)

Symbol

Function

IRQ8

Interrupt 8

Real-Time Clock interrupt request output This is an open-drain output

IRQ12

Interrupt 12

KBC’s mouse interrupt generated from internal P25 of the KBC

KBCLK

Keyboard Clock

output Connected internally to KBC’s T0

KBDAT

Keyboard Data

output Connected internally to KBC’s P10

MCLK

Mouse Clock

output Connected internally to KBC’s T1

MDAT

Mouse Data

output Connected internally to KBC’s P11

Master Reset

Active high input that resets the controller to the idle state and resets all disk

interface outputs to their inactive states The DOR DSR CCR Mode command Configure

command and Lock command parameters are cleared to their default values The Specify

command parameters are not affected The Configuration Registers are set to their selected

default values

MSEN01

79 78

Media Sense

These pins are Media Sense input pins when bit 0 of FCR is 0 Each pin has a

40 kX internal pull-up resistor

MTR0 1

75 72

FDC Motor Select 0 1

These are the motor enable lines for drives 0 and 1 and are controlled by

bits D7 – D4 of the Digital Output register They are active low outputs They are encoded with

information to control four FDDs when bit 4 of the Function Enable Register (FER) is set MTR0

exchanges logical motor values with MTR1 when bit 4 of FCR is set (See DR01 )

P12 – P17

141 – 146

KBC IO Port

Quasi-bidirectional port for general purpose input and output

P20 21

147 148

KBC IO Port

Open-drain port for general purpose input and output

PD0 – 7

136 – 133

Parallel Port Data

These bidirectional pins transfer data to and from the peripheral data bus and

the parallel port Data Register These pins have high current drive capability (See DC Electrical

131 – 128

Characteristics)

PDACK0 1

26 138

Parallel Port DMA Acknowledge

Active low input to acknowledge a connected printer’s DMA

request and enable the RD and WR inputs during a DMA transfer These inputs are valid only in

Enhanced Capabilities Port (ECP) mode At any given moment one of these two pins is

connected The pin which is not selected is ignored See bit 3 of SCF1 for pin selection

PDRQ0 1

25 70

Parallel Port DMA Request

Active high output which signals the DMA controller that a printer

data transfer is required These outputs are valid only in ECP mode These pins are in TRI-STATE

when not selected At any given moment one of these two pins is connected See bit 3 of SCF1

for pin selection

125

Parallel Port Paper End

This input is set high by a connected printer which is out of paper This

pin has a nominal 25 kX pull-down resistor attached to it

Read

Active low input to signal a data read by the microprocessor

RDATA

FDC Read Data

This input is the raw serial data read from the floppy disk drive

RI1 2

105 95

Ring Indicator

When low this indicates that a telephone ring signal has been received by the

MODEM The RI signal is a MODEM status input whose condition the CPU can test by reading bit

6 (RI) of the MODEM Status Register (MSR) for the appropriate serial channel Bit 6 is the

complement of the RI signal Bit 2 (TERI) of the MSR indicates whether the RI input has changed

from low to high since the previous reading of the MSR

Note

When the TERI bit of the MSR is set an interrupt is generated if MODEM Status interrupts are enabled

RTS1 2

109 101

Request to Send

When low this output indicates to the MODEM or data set that the UART is

ready to exchange data The RTS signal can be set to an active low by programming bit 1 (RTS)

of the MODEM Control Register to a high level A Master Reset operation sets this signal to its

inactive (high) state Loop mode operation holds this signal to its inactive state (See BADDR0 for

further information)

SELCS

National Strap Pin

A40kX internal pull-up resistor Do not pull this pin low during reset (See

CS0CF bit 7)

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