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PC87306 数据表(PDF) 2 Page - National Semiconductor (TI) |
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PC87306 数据表(HTML) 2 Page - National Semiconductor (TI) |
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2 / 110 page ![]() General Description (Continued) The RTC is a low-power design that provides a time-of-day clock a 100-year calendar several alarm features and 242 bytes of general purpose RAM An external battery is used to maintain the time and contents of the general purpose RAM when power is removed from the PC87306 The PC87306 RTC is compatible with the DS1287 and MC146818 RTC devices The PC87306 FDC uses a high performance analog data separator eliminating need for any external filter compo- nents The FDC is fully compatible with the PC8477 and incorporates a superset of DP8473 NEC mPD765 and N82077 floppy disk controller function All popular 525 and 35 floppy drives including 288 MB 35 floppy drive are supported Full TDR support for PC-AT and PS2 floppy drive types is also provided The two UARTs are fully NS16450 and NS16550 compati- ble The parallel port is fully IEEE 1284 level 2 compatible The SPP (Standard Parallel Port) is fully compatible with ISA EISA and MicroChannel parallel ports In addition to the SPP EPP (Enhanced Parallel Port) and ECP (Extended Ca- pabilities Port) modes are supported by the parallel port All IDE control signals with DMA support including support for Type F DMA are provided by the PC87306 Only external signal buffers are required to implement a complete IDE interface A set of fourteen configuration registers are provided to control various functions of the PC87306 These registers are accessed using two 8-bit wide index and data registers The ISA IO address of the register pair can be relocated using a power-up strapping option Two general purpose user programmable chip selects are available These chip selects can be used to decode game port addresses Features (Continued) Y Real-Time Clock DS1287 MC146818 and PC87911 compatible 242 Bytes battery backed-up CMOS RAM in two banks Selective lock mechanism locks any half of the RTC RAM Calendar in days day of the week months and years with automatic leap-year adjustment Time of day in seconds minutes and hours 12 or 24 hour format Optional daylight savings adjustment BCD or binary format for time keeping Three individually maskable interrupt event flags Periodic rates from 122 ms to 500 ms Time-of-day alarm once per second to once per day Separate battery pin 24V operation 2 mA typical power consumption Double buffer time registers Y UARTs Software compatible with the PC16550A and NS16450 IrDA Infrared and HP SIR Interface using UART2 with dedicated pins Y Parallel Port EPP ECP compatible with ECP level 2 support Bi-directional data transfer under software or hardware control Includes protection circuit to prevent damage to the parallel port when a connected printer is powered up or is operated at a higher voltage Y IDE Control Logic All IDE control signals with DMA and support for Type F DMA Only external signal buffers are required to implement the full IDE interface Y General Purpose Pins Separate pins for two user programmable chip select decoders provide ability to control a game port 16 additional general purpose IO ports Y Address Decoder Provides selection of all primary and secondary ISA addresses including COM1 – 4 Y Plug and Play Flexible IRQs and DMAs to meet the Plug and Play requirements of Microsoft’s PC ’95 Hardware Design Guide Multi-programmable parallel port base address Y General ISA EISA and MicroChannel compatible architecture Low power CMOS technology Ability to stop clocks to all modules The PC87323 which includes RAM KBC can be used as a development platform for KBC code for the PC87306 Reduced pin leakage current Special configuration register for power-down Disable bit for RTC 160-pin PQFP package 2 |
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