PC87309 datasheet(48/192 Pages) NSC

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The Floppy Disk Controller (FDC) (Logical Device 0)

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3.4.5

Drive Polling Phase

National Semiconductor’s FDC supports the polling mode

of old 8-inch drives, as a means of monitoring any change

in status for each disk drive present in the system. This sup-

port provides backward compatibility with software that ex-

pects it.

In the idle phase, the controller enters a drive polling phase

every 1 msec, based on a 500 Kbps data transfer rate. In

the drive polling phase, the controller checks the status of

each of the logical drives (bits 0 through 3 of the MSR). The

internal ready line for each drive is toggled only after a hard-

ware or software reset, and an interrupt is generated for

drive 0.

At this point, the software must issue four SENSE INTER-

RUPT commands to clear the status bit for each drive, un-

less drive polling is disabled via the POLL bit in the

CONFIGURE command. See “Bit 4 - Disable Drive Polling

(POLL)” on page 55. The CONFIGURE command must be

issued within 500

µsec (worst case) of the hardware or soft-

ware reset to disable drive polling.

Even if drive polling is disabled, drive stepping and delayed

power-down occur in the drive polling phase. The controller

checks the status of each drive and, if necessary, it issues

a pulse on the STEP output signal with the DIR signal at the

appropriate logic level.

The controller also uses the drive polling phase to automat-

ically trigger power down. When the specified time that the

motor may be off expires, the controller waits 512 msec,

based on data transfer rates of 500 Kbps and 1 Mbps, be-

fore powering down, if this function is enabled via the

MODE command.

If a new command is issued while the FDC is in the drive

polling phase, the MSR does not indicate a ready status for

the next parameter byte until the polling sequence com-

pletes the loop. This can cause a delay between the first

and second bytes of up to 500

µsec at 250 Kbps.

3.5

THE RESULT PHASE STATUS REGISTERS

In the result phase of a command, result bytes that hold sta-

tus information are read from the Data Register (FIFO) at

offset 05h. These bytes are the result phase status regis-

ters.

The result phase status registers may only be read from the

Data Register (FIFO) during the result phase of certain

commands, unlike the Main Status Register (MSR), which

is a read only register that is always valid.

3.5.1

Result Phase Status Register 0 (ST0)

Bits 1,0 - Logical Drive Selected

These two binary encoded bits indicate the logical drive

selected at the end of the execution phase.

The value of these bits is reflected in bits 1,0 of the SR3

00: Drive 0 selected.

01: Drive 1 selected.

10: If four drives are supported, or drives 2 and 0 are

exchanged, drive 2 is selected.

11: If four drives are supported, drive 3 is selected.

Bit 2 - Head Selected

This bit indicates which side of the Floppy Disk Drive

(FDD) is selected. It reflects the status of the HDSEL

signal at the end of the execution phase.

The value of this bit is reflected in bit 2 of the ST3 regis-

ter, described in Section 3.5.4 on page 50.

0: Side 0 is selected.

1: Side 1 is selected.

Bit 3 - Not used.

This bit is not used and is always 0.

Bit 4 - Equipment Check

After a RECALIBRATE command, this bit indicates

whether the head of the selected drive was at track 0,

i.e., whether or not TRK0 was active. This information is

used during the SENSE INTERRUPT command.

0: Head was at track 0, i.e., a TRK0 pulse occurred

after a RECALIBRATE command.

1: Head was not at track 0, i.e., no TRK0 pulse oc-

curred after a RECALIBRATE command.

Bit 5 - SEEK End

This bit indicates whether or not a SEEK, RELATIVE

SEEK, or RECALIBRATE command was completed by

the controller. Used during a SENSE INTERRUPT com-

mand.

0: SEEK, RELATIVE SEEK, or RECALIBRATE com-

mand not completed by the controller.

1: SEEK, RELATIVE SEEK, or RECALIBRATE com-

mand was completed by the controller.

Bits 7,6 - Interrupt Code (IC)

These bits indicate the reason for an interrupt.

00: Normal termination of command.

01: Abnormal termination of command. Execution of

command was started, but was not successfully

completed.

10: Invalid command issued. Command issued was not

recognized as a valid command.

11: Internal drive ready status changed state during the

drive polling mode. This only occurs after a hard-

ware or software reset.

76543210

Reset

Required

Result Phase Status

Head Selected (Execution Phase)

SEEK End

Interrupt Code

Not Used

Equipment Check

Logical Drive Selected

(Execution Phase)

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